Specific Process Knowledge/Lithography/UVLithography: Difference between revisions
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This is done in a drawing tool for mask layout. The output is a file you send to a mask house, which in return supplies you with a number of photolithographic masks. Each mask is a glass plate with a chromium pattern that mimics a layer in your layout. | This is done in a drawing tool for mask layout. The output is a file you send to a mask house, which in return supplies you with a number of photolithographic masks. Each mask is a glass plate with a chromium pattern that mimics a layer in your layout. | ||
Please read more details here: [[/Mask Design|Mask Design]] | Please read more details here: [[http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Lithography/Mask_Design/Mask Design|Mask Design]] | ||
= Resist Overview = | = Resist Overview = | ||
Revision as of 12:13, 9 April 2014
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UV Lithography uses ultraviolet light to transfer a pattern from a mask to a wafer coated with photoresist. The photoresist film is spin coated on the wafers and the pattern is transferred to the wafer by using a mask aligner. DTU Danchip houses a number of automatic or semi-automatic coaters and mask aligners.
Mask Design
In order to realize your device you will need a way to draw the patterns that define the structures in the different layers on the wafer. This is done in a drawing tool for mask layout. The output is a file you send to a mask house, which in return supplies you with a number of photolithographic masks. Each mask is a glass plate with a chromium pattern that mimics a layer in your layout.
Please read more details here: [Design|Mask Design]
Resist Overview
| Resist | Polarity | Manufacturer | Comments | Technical reports | Spin Coating | Exposure dose | Developer | Rinse | Remover | Process flows (in docx-format) |
| AZ 5214E | Positive but can be reversed | AZ Electronic Materials | Can be used for both positive and reverse processes with resist thickness between 1 to 4um. | AZ5214E.pdf | SSE, KS Spinner, III-V Spinner | Positive process:
23-33 mJ/cm2 per µm resist for i-line. ½ dose for broadband exposure. Reverse process: 10.5 mJ/cm2 per µm resist for i-line, followed by 210 mJ/cm2 flood exposure after reversal bake. ½ dose for broadband exposure. |
AZ 351B developer | DI water | Acetone | |
| AZ 4562 | Positive | AZ Electronic Materials | For process with resist thickness between 6 and 25um. | AZ4500.pdf | SSE, KS Spinner | 28 mJ/cm2 per µm resist for i-line, probably increasing with increasing thickness.
Multiple exposure recommended. ½ dose for broadband exposure. |
AZ 351B developer | DI water | Acetone | Process_Flow_thick_AZ4562.docx |
| AZ MiR 701 | Positive | AZ Electronic Materials | High selectivity for dry etch. | AZ_MiR_701.pdf | Spin Track 1 + 2 | Preliminary results:
105 mJ/cm2 per µm resist for i-line. 1/5 dose for broadband exposure. |
AZ 726 MIF developer | DI water | Remover 1165 | Process_Flow_AZ_MiR701.docx |
| AZ nLOF 2020 | Negative | AZ Electronic Materials | AZ_nLOF_2020.pdf | Spin Track 1 + 2 | <30 mJ/cm2 per µm resist for i-line, decreasing with increasing thickness.
Same dose for broadband exposure. |
AZ 726 MIF developer | DI water | Remover 1165 | Process_Flow_AZ_nLOF_2020.docx | |
| SU-8 | Negative | Microchem | SU-8_DataSheet_2005.pdf, SU-8_DataSheet_2075.pdf | KS Spinner | Thickness and process dependent.
Refer to process datasheet and literature. |
mr-Dev 600 developer (PGMEA) | IPA | Plasma ashing can remove crosslinked SU8. | Process_Flow_SU8_70um.docx |