Specific Process Knowledge/Lithography/EBL

Feedback to this page: click here

ebl e-beam writer e-beamwriter ebeamwriter e-beamlithography

Introduction to E-beam lithography at DTU Nanolab

DTU Nanolab has two E-beam writing systems, a JEOL JBX-9500 FSZ and a Raith eLINE Plus. The two systems are very different and new users should consult the EBL team to dertermine which system is appropriate for a particular project or type of sample. The general specifications of the two tools are given in the table below and may serve as a guideline for choice of system to use, especially the pros and cons list at the end of the table. Newcommers to EBL should start by watching our JEOL 9500 process video to see how a typical process is done.

Compared to UV lithography EBL is somewhat more complicated and in general a significantly longer process. Writing time (per area) is much higher and thus EBL is only adviseable for structures with Critical Dimensions (CD) below 1 µm. For CD equal to or higher than 1 µm please consider our Maskless Aligner tools.

For more information and specific workflows on either tool, please refer to their respective pages; JEOL JBX-9500FSZ or Raith eLINE Plus.

Training in E-Beam Lithography

Please request training in E-Beam lithography by sending an email with your process flow to e-beam@nanolab.dtu.dk.

The JEOL 9500 system has a fairly steep learning curve and the information below and corresponding links is fairly comprehensive and describes uses and options that first time users of the JEOL 9500 system should not venture into. Instead, first time users of the JEOL 9500 system should consult our dedicated My First JEOL 9500 Exposure guide.

JEOL 9500 and Raith eLine Plus specifications

EBL system comparison table
Equipment		JEOL JBX-9500FSZ	Raith eLINE Plus
Performance	Resolution	8 nm	35 nm
	Maximum writing field	1mm x 1mm	1mm x 1mm
Process parameter range	Acceleration voltage	100 kV	1-30 kV
	Scan speed	100 MHz	20 MHz
	Min. electron beam size	4 nm	10 nm
	Min. step size	0.25 nm	1 nm
	Beam current range	0.1 nA to 100 nA	0.01 to 12 nA
	Minimum dwell time	10 ns	50 ns
Samples	Batch size	Wafer cassettes: 6 x 2" wafers 2 x 4" wafers 1 x 6" wafer 1 x 8" wafer Special chip cassette with slit openings of 20 mm (position A), 12 mm (position B), 8 mm (position C) and 4 mm (position D).	Chips up to 75 x 75 mm 4" wafer holder 6" wafer holder (stage movement limited to central 100 x 100 mm region)
	Substrate material allowed	Silicon, quartz, pyrex, III-V materials Wafers with layers of silicon oxide or silicon (oxy)nitride Wafers with layers of metal	Silicon, quartz, pyrex, III-V materials Wafers with layers of silicon oxide or silicon (oxy)nitride Wafers with layers of metal
General considerations	Pros	100 kV Sub 10 nm resolution Automatic beam optimization High current and process speed Automatic sample exchange High level of programmability for automatic job execution EBL workhorse for large designs	Readily available More intuitive software Easier SEM mode alignment Build in SEM automation for post exposure process control 2D stacks (HBN/graphene) allowed without Al coating Excellent for small chips or small area design exposure
	Cons	Steep learning curve Availability - booking calendar is usually full 5 weeks ahead	Maximum 30 kV User dependent performance/beam optimization Minimum feature size >35 nm Difficult to handle design files >1 GB Slower writing speed

Generalized workflow

While the EBL workflow resembles that of UV lithography there are a few additional complications and the parameter space is somewhat larger. The complications all arise from using electrons rather than light for exposure. Since a beam of electrons is used for exposure the substrate must be sufficiently conductive and grounded in order not to build up a charge. If the substrate in itself is not conductive a thin metal film or other conductive surface layer must be applied to it, read more on this in the resist section. Another complication is secondary exposure from backscattered electrons. This is a much bigger topic and covered in the pattern preparation section. A generalised workflow is shown below.

Since substrate preparation and development processes are (nearly) identical for the JEOL and Raith eLine systems they are described in common below. Pattern preparation, job preparation and job execution are fairly different between the two tools and hence these steps are described on the specific tool pages.

Substrate preparation

Resist coating

An appropriate EBL resist must naturally be applied to the substrate. DTU Nanolab supplies a number of standard resists, please consult the table below. The default positive EBL resist is AR-P 6200.09 (CSAR). CSAR installed on Spin Coater: Gamma E-beam and UV for spin coating of 2", 4" and 6" substrates. For other substrate sizes (i.e. chips) or other resists Spin Coater: LabSpin 02/03 have to be used instead. The standard resist bottles are stored in the chemical cupboard in E-4.

Contrary to most UV resist it is in general not advisable to use HMDS priming when coating with EBL resists. There can of course be exceptions to this but we do not recommend HMDS priming when using the DTU Nanolab supplied EBL resists.

We recommend all groups or users to have their own bottle of e-beam resist inside the cleanroom. Please follow the user resist bottles in the cleanroom guide.

DTU Nanolab supplied standard EBL resists and process guides
Resist	Polarity	Manufacturer	Technical reports	Spin Coater	Polynomial	Thinner	Developer	Rinse	Remover	Process flows (in docx-format)
CSAR AR-P 6200	Positive	AllResist	AR-P 6200 info	Spin Coater: Gamma E-beam and UV or Spin Coater: LabSpin 02/03	a = 7252.2, b = -0.454	Anisole	AR-600-546 AR-600-548 N50 MIBK:IPA	IPA	AR-600-71 Remover 1165	CSAR CSAR with Al LOR5A with CSAR
Medusa AR-N 8200	Negative	AllResist	AR-N 8200 info	Spin Coater: LabSpin 02/03	a = ?, b = ?	AR 600-07	AR 300-47:DIW (1:1)	DIW	BOE
AR-N 7500	Negative	AllResist	AR-N 7500 info	Spin Coater: LabSpin 02/03	a = ?, b = ?	PGMEA	AR 300-47:DIW (4:1) MIF726:DIW (8:5)	DIW	AR 300-73 O2 plasma

Resist thickness as function of spin speed on Lab Spin 2/3 can be estimated from the parameters above as y = ax^b, where y is resist thickness in nm and x is spin speed in RPM.

It is possible to obtain permission to user other resists at DTU Nanolab, users must however provide these resists and possibly developers themselves. A non-exhaustive list of user supplied EBL resist used at DTU Nanolab and some process guidelines can be found in the table below.

Non standard, user supplied EBL resists and process guides
Resist	Polarity	Manufacturer	Comments	Technical reports	Spin Coater	Thinner	Developer	Rinse	Remover	Process flows (in docx-format)
ZEP520A	Positive resist, contact Lithography if you plan to use this resist	ZEON	Positive resist	ZEP520A.pdf, ZEP520A spin curves on SSE Spinner	See table here	Anisole	ZED-N50/Hexyl Acetate,n-amyl acetate, oxylene. JJAP-51-06FC05‎, JVB001037	IPA	acetone/1165	Process Flow ZEP
Copolymer AR-P 617	Positive	AllResist	Approved, not tested yet. Used for trilayer (PE-free) resist-stack or double-layer lift-off resist stack. Please contact Lithography for information.	AR_P617	See table here	PGME	AR 600-55, MIBK:IPA		acetone/1165	Trilayer stack: Process Flow
mr EBL 6000.1	Negative	MicroResist	Standard negative resist	mrEBL6000 processing Guidelines‎	See table here	Anisole	mr DEV	IPA	mr REM	Process Flow‎
HSQ (XR-1541)	Negative	DOW Corning	Approved. Standard negative resist	HSQ Dow Corning, MSDS HSQ	See table here		TMAH, AZ400K:H2O	H2O		process flow HSQ High resolution patterning with HSQ
AR-N 7520	Negative	AllResist	Both e-beam, DUV and UV-sensitive resist. Currently being tested, contact Peixiong Shi for information.	AR-N7500-7520	See table here	PGMEA	AR 300-47, TMAH	H2O
PMMA	Positive	AllResist			See table here	Anisole	MIBK:IPA (1:3), IPA:H2O	IPA	acetone/1165/Pirahna
ZEP7000	Positive	ZEON	Not approved. Low dose to clear, can be used for trilayer (PEC-free) resist-stack. Please contact Lithography for information.	ZEP7000.pdf	See table here	Anisole	ZED-500/Hexyl Acetate,n-amyl acetate, oxylene.	IPA	acetone/1165	Trilayer stack: Process Flow‎

Discharge layer application

As exposure is done with an electron beam, insulating substrates will cause a build up of charge that will deflect the incoming beam and disturb pattern definition. It is therefore necesarry when working with insulating substrates or substrates with thick (> 200 nm) dielectric films to apply a discharge layer. This is typically applied on top of the EBL resist layer and must be removed in between exposure and development. The most common discharge layer is 20 nm thermally evaporated Al. Bear in mind that it should be thermally evaporated and not e-beam evaporated. Thermal evaporation of Al can be done in Thermal evaporator and Wordentec. The Al layer can be removed with MIF726 after exposure. MIF726 etch rate in Al is about 0.5 nm/s, although only about 1 nm/min in oxidized aluminium.

For samples with 2D materials such as graphene, HBN, etc., it is mandatory to apply a 20 nm Al layer on top of the resist in order to expose the substrate in the JEOL 9500 system. The Raith eLine system does not have this requirement.

Another possibility is to use a spin-on conductive layer such as AR-PC 5090. It can be removed with water after exposure. At the moment we do not have much experience with this, contact the EBL team if you are interested in this option.

Inspection

Example of rejected samples with visible bubbles in resist/Al coating and (a lot) of resist residue on the backside.

Post exposure pattern dimensions are dependent on resist thickness. Thus, it is advisable to verify resist thickness after spin coating. This can be done by ellipsometry in the VASE Ellipsometer.

As the cleanliness requirement of the JEOL is very high, substrates that does not visually appear to be in a good condition will be rejected by the JEOL 9500 cassette loading team. It is therefore a good idea to perform your own visual inspection. The loading team will inspect your samples for any types of flakes or bubbles in the surface layers of the sample. Samples with flakes or bubbles will be rejected.

Samples with resist residues on the backside will also be rejected. If you have resist residues on the backside of your wafer you should wipe it off with an appropriate solvent.

Pattern preparation

Pattern preparation is somewhat different depending on if a pattern is exposed on JEOL 9500 or Raith eLine Plus. Please refer to the correct pattern preparation section below.

Pattern preparation for exposure on JEOL 9500.

Pattern preparation for exposure on Raith eLine Plus.

Job preparation

Job preparation is also different depending on if a pattern is exposed on JEOL 9500 or Raith eLine Plus. Please refer to the correct job preparation section below.

Job preparation for exposure on JEOL 9500.

Job preparation for exposure on Raith eLine Plus.

Job execution

Job execution is covered by the respective tool usage manuals found here

• JEOL 9500 user manual
• Raith eLine Plus user manual

Development

AR 600-546 and ZED N-50 developers are available in a semi automatic puddle developer Developer: E-beam in E-4, mainly intended for development of AR-P 6200 and ZEP 520A. It has automatic recipes for puddle development cycles for 10, 30 and 60 seconds of either of the two developers, each finishing off with an IPA rinse and drying cycle. The system can handle chips, 2", 4" and 6" wafers.

Other resist have to be developed in the E-beam developer fumehood in E-4 in beakers. Please notice there are specific beaker sets for alkaline developers and for solvent based developers.

Post development inspection

After development it is often necesarry to evaluate the result by SEM to verify feature dimensions. This can conviently be done in the Raith eLine Plus tool which apart from being an EBL tool is also a semiautomatic SEM. The strong suit of the tool is the ability to link/align a design file to the substrate and simply define image positions in the design file. The user can then set up a long list of image locations and the tool will acquire the SEM images without further user input. When set up correctly the system can acquire about one image per 5 seconds which is very advantageous for large arrays of structures. For an introduction to this, please refer to our automatic SEM introduction video.

After image acquisition the images can be semi automatically processed with ProSEM to determine feature sizes. For large image sets the software can generate an Excel sheet with various dimension outputs.

Literature on E-beam Lithography

• Handbook of Microlithography, Micromachining, and Microfabrication, Volume 1: Microlithography, P. Rai-Choudhury (Editor), chapter 2 (p 139 – 250). Link to book can be found here: http://www.cnf.cornell.edu/cnf_spietoc.html
• Lithography, Wiley, 2011: Chapter 3, Electron Beam Lithography by Stefan Landis: http://onlinelibrary.wiley.com/doi/10.1002/9781118557662.ch3/summary