Specific Process Knowledge/Etch/III-V ICP/InP-InGaAsP-InGaAs: Difference between revisions
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*Sidewall passivation assisted by a silicon coverplate during and HBr inductively coupled plasma etching of InP for photonic devices ''by S. Bouchoule, G. Patriarche, S. Guilet, L. Gatilova, L. Largeau, and P. Chabert'', Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 26, 666 (2008); doi: 10.1116/1.2898455 | *Sidewall passivation assisted by a silicon coverplate during and HBr inductively coupled plasma etching of InP for photonic devices ''by S. Bouchoule, G. Patriarche, S. Guilet, L. Gatilova, L. Largeau, and P. Chabert'', Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 26, 666 (2008); doi: 10.1116/1.2898455 | ||
*Optimization of a inductively coupled plasma etching process adapted to | *Optimization of a inductively coupled plasma etching process adapted to nonthermalized InP wafers for the realization of deep ridge heterostructures, ''by S. Guilet, S. Bouchoule, C. Jany, C. S. Corr, and P. Chabert'', Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 24, 2381 (2006); doi: 10.1116/1.2348728 | ||
nonthermalized InP wafers for the realization of deep ridge heterostructures, ''by S. Guilet, S. Bouchoule, C. Jany, C. S. Corr, and P. Chabert'', Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 24, 2381 (2006); doi: 10.1116/1.2348728 | |||