LabAdviser/Technology Research/Fabrication of Hyperbolic Metamaterials using Atomic Layer Deposition/TiO2 Q plates

Procces flow description

The substrates for the samples were fabricated by depositing 1 μm of Si₃N₄ (the resonator layer) on 100 mm silicon < 100 > wafers using low-pressure chemical vapor deposition. The process was carried out at 780C with ammonia (NH₃) and dichlorosilane (SiH₂Cl₂) as reactive gases. Thickness and refractive index of the deposited silicon nitride was measured and confirmed using spectroscopic ellipsometry. The deposited Si₃N₄ film was carefully analyzed for existence of cracks, particles and other defects using dark field optical microscopy. The best-quality wafer with Si₃N₄ was selected and cleaved in pieces, which were used as substrates for the deposition of Al₂O₃/TiO₂ multilayers. Before inserting each substrate into the ALD reactor, it was placed on a Si carrier wafer. Therefore the Al₂O₃/TiO₂ multilayers were grown not only on the Si₃N₄ layer but also on the dummy carrier wafer. After the ALD process was completed, the dummy was cleaved and its cross-section was characterized using scanning electron microscopy (SEM). The SEM images reveal high-quality homogeneous, conformal coatings, as seen in the examples in Figs 1. Such a method of deposited multilayers characterization turned out to be more feasible than the direct SEM characterization of multilayers on Si₃N₄, since the latter suffers from issues related to charge accumulation on the silicon nitride.

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  High aspect ratio Al₂O₃ and TiO₂ nanogratings.

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  High aspect ratio Al₂O₃ and TiO₂ nanogratings.
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  High aspect ratio Al₂O₃ and TiO₂ nanogratings.

Process flow

Hej Evgeniy
Jeg har lagt dette eksemple på et process flow ind. Alt tekst og billeder skal selvfølgelig erstattes af relevante process steps for denne artikel.

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Step		Description	LabAdviser link	Image showing the step
1.1	RCA clean	Before Si deposition in LPCVD furnace, the quartz (fused silica) wafers need to be cleaned	RCA
1.2	LPCVD of Si	LPCVD deposition of 300 nm amorphous Si	6" LPCVD polysilicon furnace (E2).
1.3	Si anisotropic wet etch	Removal of the Si from the back side of the wafer.	KOH.
1.4	Plasma surface treatment	To ensure that all organic remainings are gone, wafer is treated by O2/N2 plasma. (Optional step)	Plasma Asher 2 Plasma Asher 1
1.5	E-beam lithography (EBL)	Spin-coating of CSAR resist to the thickness of 150 nm, followed by e-beam exposure.	JEOL JBX-9500 Electron-beam
1.6	Advanced Silicon Etching	Creating sacrificial silicon template.	ASE
1.7	Scanning Electron Microscopy inspection	The fabricated template inspects by SEM	SEM Supra 1 SEM Supra 2 SEM Supra 3
1.8	Plasma surface treatment	To ensure that all organic remainings are gone, template is treated by O2/N2 plasma. (Optional step)	Plasma Asher 2 Plasma Asher 1
1.9	Atomic Layer Deposition of TiO2	Deposition carried at 150C.Thickness is approx. 90 nm.	Equipment used: ALD Picosun R200. Standard recipe used: TiO2T .
1.10	Ion beam etching (IBE).	Opening of deposited TiO2 top layer using recipe "Ti acceptance" there the stage was placed to 0o degree. The back side of the wafer also needs to be exposed to etching.	IBE/IBSD Ionfab 300
1.11	Scanning Electron Microscopy inspection	SEM inspection of ALD deposition and IBE etching.	SEM Supra 1 SEM Supra 2 SEM Supra 3
1.12	Selective etch of Si between ALD TiO2 coatings.	Si etching proceeds using Reactive Ion Etching (RIE) with isotropic process based on SFf process gas.	Equipment used: RIE2.
1.13	Scanning Electron Microscopy inspection of fabricated structure.	Proof of final result.	SEM Supra 1 SEM Supra 2 SEM Supra 3