Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-3

From LabAdviser

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Pegasus 3 - 150mm silicon etching

The tool is already installed and ready to process.

The twin Pegasi (3 and 4) have just been rolled into the lab on July 3rd 2018.


The user manual(s), quality control procedure(s) and results, user APV(s) are not available, technical information and contact information can be found in LabManager:

Equipment info in LabManager

Process information

Standard recipes

Hardware changes

A few hardware modifications have been made on the Pegasus 3/4 since it was installed in 2019. The changes are listed below.


Other etch processes

More processes, such as for DUV resist, are currently being developed, but they are not quite 'ready for publication' at LabAdviser so please contact Jonas (mailto:jmli@dtu.dk) for more information.



Advanced Processing - Henri Jansen style

Wafer bonding

To find information on how to bond wafers or chips to a carrier wafer, click here.

Characterisation of etched trenches

Comparing differences in etched trenches requires a set of common parameters for each trench. Click HERE to find more information about the parameters used on the DRIE-Pegasus process development.


Internal Nanolab Process log for Pegasus 3

Process log at Nanolab [1]