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Specific Process Knowledge/Etch/DRIE-Pegasus: Difference between revisions

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=== Process C ===
=== Process C ===


Process A is labelled ''Via (30μm diameter) 100μm depth''. In the acceptance test the process was run on a 100 mm SPTS wafer with 12-13 % etch load.  
Process A is labelled ''Nano silicon etch''. In the acceptance test the process was run on a 100 mm Danchip wafer with a test pattern of a series of lines and dots with sizes ranging from 30 nm to 300 nm. The etch load was extremely high, approaching 100 %.


[[Specific Process Knowledge/Etch/DRIE-Pegasus/processC|Process C: Recipe, specifications and results]]
[[Specific Process Knowledge/Etch/DRIE-Pegasus/processC|Process C: Recipe, specifications and results]]