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| <br clear="all" /> | | <br clear="all" /> |
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| ==Oxide insulation analysis==
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| ''by Bjarke Thomas Dalslet @Nanotech.dtu.dk''
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| The wafers in this analysis consisted of a Si substrate with no native oxide. A layer of SiO<math>_2</math> was reactively sputtered (9% O2 90 W 3.5 mTorr). After that, using a shadow mask, 200nm thick gold rectangles was electro deposited on top of the oxide. Gold was also electro deposited on the back side. Then the impedance as a function of frequency was recorded.
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| The figure shows the measurements for different oxide thicknesses. Most of the measurements show perfect capacitors, although for illustration measurements with a few pinholes and with many pinholes is also shown for the 20 nm sample.
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| The success rate for the different thicknesses can be seen in the table, together with the number of samples measured and the number of perfect capacitors.
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| It is possible to make perfect capacitors with oxide thicknesses down to and including 5 nm and possibly even thinner, although the failure rate increases. Bear in mind, though that each structure measured here has an area of 8 mm<sup>2</sup> - for a 1 mm<sup>2</sup> structure the failure rate would be much lower, assuming the short circuits are not located on the sides of the structures.
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| [[Image:Lesker_Impedance_Bjarke.png|600px|alt text]]
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| {| {{table}} border="1" cellspacing="0" cellpadding="8"
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| | align="center" style="background:#f0f0f0;"|'''Name'''
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| | align="center" style="background:#f0f0f0;"|'''Thickness [nm]'''
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| | align="center" style="background:#f0f0f0;"|'''# samples measured'''
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| | align="center" style="background:#f0f0f0;"|'''# good capacitors'''
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| | align="center" style="background:#f0f0f0;"|'''Success rate [%]'''
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| |-
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| | 38||5||11||1||9
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| |-
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| | 39||10||10||2||20
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| |-
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| | 40||20||7||3||43
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| | 41||30||7||7||100
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| |-
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| | 37||50||7||7||100
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| |-
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| |}
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| <br>
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| ==Stress in deposited films== | | ==Stress in deposited films== |
