Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-1

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DRIE-Pegasus 1

The DRIE-Pegasus 1 load lock and cassette loader in the Danchip cleanroom A-1

The user manual(s), quality control procedure(s) and results, user APV(s), technical information and contact information can be found in LabManager:

Equipment info in LabManager

Process information

Standard recipes

• Process A (Large trench): 80 µm wide trench etched down to a depth of 150 µm

• Process B (Via etch): 30 µm diameter via etched down to a depth of 100 µm

• Process C (Nano etch): 50-300 nm posts

• Process D (Micro stamp) Please note that this process has changed

• SOI etch

Hardware changes

A few hardware modifications have been made on the Pegasus since it was installed in 2010. The changes are listed below.

• Change of showerhead in December 2014

• Addition of Picoscope oscilloscope system for process monitoring in February 2017

• Addition of a Claritas optical endpoint system in June 2018

Other etch processes

• Nanostructure etches including nano1.42

• Etch processes with DUV masks

• BARC etches

• Isotropic etches

More processes, such as for DUV resist, are currently being developed, but they are not quite 'ready for publication' at LabAdviser so please contact Jonas (mailto:jml@danchip.dtu.dk) for more information.

Advanced Processing - Henri Jansen style

• Etch high aspect ratio silicon microstructures
• Etch 3 dimensional silicon microstructures
• Etch black silicon
• Using OES to monitor etch process

Wafer bonding

To find information on how to bond wafers or chips to a carrier wafer, click here.

Acceptance test

The instrument was opened for users in April 2010 when the acceptance test was signed. This was based on the performance of five standard recipes (A, B, C, D and SOI) that are further examined below. The acceptance test report is found here.

Characterisation of etched trenches

Comparing differences in etched trenches requires a set of common parameters for each trench. Click here to find more information about the parameters used on the DRIE-Pegasus process development.

Material from SPTS

• Hardware and process applications

• Miscellaneous information

Internal Danchip Process log

Process log at Danchip [1]