Specific Process Knowledge/Lithography/EBeamLithography: Difference between revisions

From LabAdviser
← Older editNewer edit →
VisualWikitext
Tigre (talk | contribs)
DCH-Employees-701
2,257 edits
No edit summary
Tigre (talk | contribs)
DCH-Employees-701
2,257 edits
Line 312: Line 312:


The process flow for a standard e-beam exposure on CSAR with Al on top can be found here [[media:Process Flow CSAR with Al.docx|Process Flow CSAR with Al]].
The process flow for a standard e-beam exposure on CSAR with Al on top can be found here [[media:Process Flow CSAR with Al.docx|Process Flow CSAR with Al]].
= JEOL JBX-9500FSZ =
The machine is located in a class 10 cleanroom (E-2) with tight temperature and moisture control. The room must only be entered when the machines or equipment inside the room is intended to be used.
You can read more about electron beam writing in this book published by [http://www.cnf.cornell.edu/cnf_spietoc.html SPIE].
'''The user manual, technical information and contact information can be found in LabManager and LabAdviser:'''
<!-- remember to remove the type of documents that are not present -->
<!-- give the link to the equipment info page in LabManager: -->
# [http://labmanager.danchip.dtu.dk/function.php?module=Machine&view=view&mach=292  E-beam writer in LabManager]
# [[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual|User manual for JBX-9500 e-beam writer on LabAdviser]]
# [[Specific_Process_Knowledge/Lithography/EBeamLithography/BEAMER|BEAMER Manual on LabAdviser]]
# [[Specific_Process_Knowledge/Lithography/EBeamLithography/FilePreparation|Sdf- and jdf file preparation manual on LabAdviser]]
== Getting started ==
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography#top|Go to top of this page]]</span>
[[Image:Conversion.png|600px|right|]]
To request for an e-beam training session, contact [mailto:e-beam@danchip.dtu.dk e-beam@danchip.dtu.dk]; a DTU Danchip personnel will hereafter provide a time slot. Users require '''at least 4 training sessions''' before being allowed full acccess to the machine. The first training will focus on file preparation and compilation alone.
'''It takes several months to get full authorization to the machine. Therefore, if you are either in a hurry, or a visiting researcher, or only require a few e-beam exposures to fulfill your project, let one of your authorized colleagues expose for you.'''
Before you request for a training on the machine, fulfill the following steps:
'''Prepare a v30-file:'''
# Prepare your pattern using a layout software (L-edit, CleWin, CAD) and export that to GDS format. Check your GDS-file by importing it in e.g. <span class="plainlinks">[http://www.wieweb.com/ns6/index.html CleWin]</span> or L-edit. In order to reach the files from the computers inside the cleanroom it is recommended to either dropbox them or send them per email to yourself.
# Convert the GDS file to v30 using BEAMER; a manual for BEAMER software is found [[Specific_Process_Knowledge/Lithography/EBeamLithography/BEAMER|here]]
'''Create sdf and jdf-files:'''
#download [http://download.cnet.com/SuperEdi/3000-2352_4-10291091.html SuperEdi],
#read the sdf and jdf-file manual found [[Specific_Process_Knowledge/Lithography/EBeamLithography/FilePreparation|here]],
#find templates of sdf and jdf files on the cleanroom drive in the folder E-beam sdf and jdf templates.
''' Gather Experience '''
#Assist a fully trained colleague of yours when she or he e-beam writes, gather as much knowledge about your e-beam run, i.e. which e-beam current, aperture and dose to use, which shot pitch (e.g. SHOT A,10).
# Study the logbook for the e-beam writer: sheet 1 gives you an overview of which condition files (currents and apertures) have been in use recently by which user on which type of resist. On sheet 2 in this logbook you can find a writing time estimation program.
# Study the manual for the machine, it can be found [[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual|here]]
''' Prepare a process flow'''
#Describe your entire process in a process flow. The process flow should include all information such as type and thickness of resist, size and type of substrate, which processes are to be done before and after e-beam writing. Find process flow templates [[Specific_Process_Knowledge/Lithography/EBeamLithography#E-beam_resists_and_Process_Flows | here]]. '''Attach your process flow to your request for training.'''
<br clear="all" />
== General Rules ==
For safety reasons, even fully trained users are only authorized to mount substrates into the e-beam cassettes, but not authorized to load the cassettes into the autoloader.
To use the e-beam writer, book the machine via LabManager, '''note the number and type of substrate as well as the condition file to be used in the 'Public Comment:' field in LabManager'''. Mount your substrate in the cassette and pre-align if necessary. Call for help from DTU Danchip staff to load your cassette into the robot loader (the autoloader).
After your exposure, fully trained users can unload their cassettes from the autoloader, unmount their substrates and re-load an '''empty''' cassette into the autoloader.
If you are unable to unmount your substrates before another user requires the cassette, you must accept that either the next user or DTU Danchip personel unmount your substrates.
== Cassettes ==
Authorized users are allowed to unload a cassette from the robot loader (autoloader) and mount their substrate but '''not''' allowed to load the cassette into the loader after mount.
We have one chip cassette, 2 2" cassettes, 2 4" cassettes, many 6" cassettes and 1 8" cassette. Some cassettes are made of Aluminum, others of Titanium. The thermal expansion coefficient of Ti is much lower than of Al; bear this in mind if you have crucial patterns to expose.
'''Keep''' an eye on the wafer orientation when you mount; the 2" aluminum cassette still have wafer orientation flat-up.
{| cellpadding="2" style="border: 2px solid darkgray;" align="right"
! width="250" |
! width="250" |
! width="250" |
! width="250" |
! width="250" |
|- border="0"
| [[File:IMG_0239.jpg|150px]]
|[[File:IMG_6440.jpg|150px]] [[File:IMG_6441.jpg|150px]]
| [[File:IMG_6433.jpg|150px]]  [[File:IMG_6434.jpg|150px]]
| [[File:IMG_6436.jpg|150px]] [[File:IMG_6437.jpg|150px]]
|[[File:IMG_6438.jpg|150px]]  [[File:IMG_6439.jpg|150px]]
|- align="center"
| chip Al/Cu cassette with slot widths of 20 mm, 12 mm, 8 mm and 4 mm || 2" Ti cassette; wafer orientation is flat-down || 2" Al cassette; wafer orientation is flat-up || 4" Ti cassette; wafer orientation is flat-down || 4" Al cassette; wafer orientation is flat-down
|}
<br> <br> <br> <br>

Revision as of 11:12, 28 January 2016

JEOL JBX-9500 E-beam writer positioned in room E-2

Feedback to this page: click here


Performance of the e-beam writers at DTU Danchip

Equipment JEOL JBX-9500FSZ Raith Elphy
Performance Resolution ~5 nm beam diameter, ~10 nm lines obtained in 50 nm thick resist (CSAR)
Maximum writing area without stitching 1mm x 1mm
Process parameter range E-beam voltage 100 kV 5-25 kV
Scanning speed 100 MHz ? MHz
Min. electron beam size 4 nm
Min. step size 1 nm 1 nm
Beam current range 0.1nA to 60nA in normal conditions X-Y nA
Dose range 0.001 - 100000µC/cm2 µC/cm2
Samples Batch size

Wafer cassettes:

  • 6 x 2" wafers
  • 2 x 4" wafers
  • 1 x 6" wafer
  • Special wafer cassette with slit openings of 20 mm (position A), 12 mm (position B), 8 mm (position C) and 4 mm (position D).
Substrate material allowed
  • Silicon, quartz, pyrex, III-V materials
  • Wafers with layers of silicon oxide or silicon (oxy)nitride
  • Wafers with layers of metal
  • Silicon, quartz, pyrex, III-V materials
  • Wafers with layers of silicon oxide or silicon (oxy)nitride
  • Wafers with layers of metal




E-beam resists and Process Flows

Go to top of this page


The table describes the e-beam resist used in the cleanroom for standard e-beam exposure. Some of resists are not provided by DTU Danchip and some are not yet approved for common use in the cleanroom and are currently being tested. If you wish to test some of these resists or other resists, please contact Lithography.

Standard DTU Danchip resists purchased and tested by DTU Danchip:

Resist Polarity Manufacturer Comments Technical reports Spin Coater Thinner Developer Rinse Remover Process flows (in docx-format)
CSAR Positive AllResist Standard positive resist, very similar to ZEP520. Allresist_CSAR62_English.pdf‎,, CSAR_62_Abstract_Allresist.pdf‎ See table here Anisole AR-600-546, AR-600-548, N50, MIBK:IPA IPA AR-600-71, 1165 Remover Process Flow CSAR.docx‎
Process Flow CSAR with ESPACER
Process Flow CSAR with Al
ZEP520A Positive resist, contact Lithography if you plan to use this resist ZEON Positive resist ZEP520A.pdf, ZEP520A spin curves on SSE Spinner See table here Anisole ZED-N50/Hexyl Acetate,n-amyl acetate, oxylene. JJAP-51-06FC05.pdf‎, JVB001037.pdf‎ IPA acetone/1165 Process_Flow_ZEP.docx



Copolymer AR-P 617 Positive AllResist Approved, not tested yet. Used for trilayer (PEC-free) resist-stack or double-layer lift-off resist stack. Please contact Lithography for information. AR_P617.pdf‎ See table here PGME AR 600-55, MIBK:IPA acetone/1165 Trilayer stack: Process_Flow_Trilayer_Ebeam_Resist.docx‎
mr EBL 6000.1 Negative MicroResist Standard negative resist mrEBL6000 processing Guidelines.pdf‎ See table here Anisole mr DEV IPA mr REM Process_Flow_mrEBL6000.docx‎


HSQ (XR-1541) Negative DOW Corning Approved. Standard negative resist, mainly for III-V materials See table here TMAH, AZ400K:H2O H2O
AR-N 7520 Negative AllResist Both e-beam, DUV and UV-sensitive resist. Currently being tested, contact Peixiong Shi for information. AR-N7500-7520.pdf‎ See table here PGMEA AR 300-47, TMAH H2O



Non-standard DTU Danchip resists not purchased by DTU Danchip:

Resist Polarity Manufacturer Comments Technical reports Spinner Thinner Developer Rinse Remover Process flows (in docx-format)
PMMA Positive AllResist We have various types of PMMA in the cleanroom. Please contact Lithography for information. See table here Anisole MIBK:IPA (1:3), IPA:H2O IPA acetone/1165/Pirahna


ZEP7000 Positive ZEON Not approved. Low dose to clear, can be used for trilayer (PEC-free) resist-stack. Please contact Lithography for information. ZEP7000.pdf See table here Anisole ZED-500/Hexyl Acetate,n-amyl acetate, oxylene. IPA acetone/1165 Trilayer stack: Process_Flow_Trilayer_Ebeam_Resist.docx‎





Proximity Error Correction

Go to top of this page


Even though the electron beam diameter is below 5 nm, the feature and pitch resolution in resist is limited by the forward and backward scattering of the electrons. The forward scattering depends on the electron acceleration voltage, the resist material and thickness. The backward scattering depends on the electron acceleration voltage and the substrate material [1], [2].

As the travel distance of backscattered electrons is fairly large, e-beam patterned structures will be influenced by adjacent e-beam patterned structures, i.e. a proximity effect. These proximity effects can be avoided either by simulating a proximity error correction (PEC) in BEAMER or by using the right stack of e-beam resist.


Proximity Error Correction (PEC) in BEAMER

BEAMER is endowed with a software that corrects for proximity errors in the e-beam exposure. You can read more about this function in the BEAMER manual here and in the BEAMER presentation here BEAMERPresentation.pdf‎.

The proximity error correction require a forward and a backward range parameter, alfa and beta, and a ratio of backscattered energy to the forward scattered energy, eta. As alfa depends on the electron acceleration voltage, which is constant at 100kV, alfa is in BEAMER fixed to 0.007. Help to find beta and eta can be found here.

Alternatively, a point-spread function can be used in BEAMER to calculate the optimised dose-variation.



Trilayer resist stack

As an alternative to PEC, a trilayer reists stack with a thin layer of thermally evaporated Ge can be used [3]. This reists stack has not yet been tested at DTU Danchip. A process flow for this procedure can be found here Process_Flow_Trilayer_Ebeam_Resist.docx‎, but please contact Lithography before use.



Charging of non-conductive substrates

Go to top of this page

All substrates are grounded to the cassette when properly loaded. In a non-conducting substrate, the accumulation of charges in the substrates will however destroy the e-beam patterning. To avoid this, a charge dissipating layer is added on top of the e-beam resist; this will provide a conducting layer for the electrons to escape, while high-energy electrons will pass through the layer to expose the resist.

If you wish to investigate the charge dissipation using other methods than below, please contact Lithography.

ESPACER

Espacer is a chemical that works as a discharging layer; it is spun onto the wafer on top of the resist and easily rinsed off the wafer after e-beam exposure. Visit this page for more information: Espacer


Aluminum coating

At DTU Danchip, we recommend to use a thin (20 nm) layer of thermally evaporated aluminum on top of the e-beam resist. Preferably, the thickness of Al and the e-beam dose should be optimised to the features you wish to e-beam pattern [4]. A good starting point is 20 nm Al; from here dose and development can be optimised to reach the resolution and feature size required.

The process flow for a standard e-beam exposure on CSAR with Al on top can be found here Process Flow CSAR with Al.

Retrieved from "https://labadviser.nanolab.dtu.dk//index.php?title=Specific_Process_Knowledge/Lithography/EBeamLithography&oldid=21723"