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The Phosphorus Predep furnace (A4) can be used for predeposition of silicon wafers with phosphorus, resulting in N-type doping. In the furnace, the silicon wafers are positioned in a quarts boat.
The Phosphorus Predep furnace (A4) can be used for phosphorus predeposition of silicon wafers, resulting in N-type doping. In the furnace, the silicon wafers are positioned in a quarts boat.


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To study the coherence between the temperature for the predeposition process and drive-in of the doping with phosphorus in the Phosphorus Predep furnace (A4) at DTU Danchip.  
To study the correlation between the temperature for the predeposition process and drive-in of the phosphorus doping in the Phosphorus Predep furnace (A4) at DTU Danchip.  


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====Experimental setup====
====Experimental setup====
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20 boron doped wafers (p-type) were used - Four wafers for each of the five different predeposition temperatures. In the furnace five dummy wafers were placed on each side of the processed wafers. The dummy wafer nearest to the test wafers were changed in-between the runs to miniminze doping from this dummy wafer.  
20 boron doped device wafers (p-type) were used - Four wafers for each of the five different predeposition temperatures. In the furnace five dummy wafers were placed on each side of the device wafers. The dummy wafers nearest to the device wafers were changed in-between the runs to miniminze doping from these dummy wafers.  


{| border="1" cellspacing="1" cellpadding="2" style="text-align:center;" width="690" ||3||4||5
{| border="1" cellspacing="1" cellpadding="2" style="text-align:center;" width="690" ||3||4||5
!| Run #||Temperature||Process time with POCl<sub>3</sub>||Anneal time in N<sub>2</sub>||Wafer #
!| Run #||Temperature||Process time with POCl<sub>3</sub>||Annealing time in N<sub>2</sub>||Wafer #
|-  
|-  
|1||850 <sup>o</sup>C||15 minutes||20 miuntes||1, 2, 3, 4
|1||850 <sup>o</sup>C||15 minutes||20 miuntes||1, 2, 3, 4
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|}
|}
'''
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After the predeposition two wafers from each run were taken out to be further processed. These wafers were: 1, 2, 5, 6, 9, 10, 13, 14, 17, 18.  
After the predeposition two wafers from each run were taken out to be further processed. These wafers were: 1, 2, 5, 6, 9, 10, 13, 14, 17, 18. These wafers were dipped in BHF to remove the phosphorus glass layer before the drive-in process.  


These wafers were dipped in BHF to remove the phosphorus glass layer before the drive-in process. The drive-in process was made in the Phosphorus Drive-in furnace (A3). At the drive-in process a dummy wafer was placed in-between the wafers from different temperatures so doping from wafer to wafer was minimized. The drive-in was done with the process "DRY1050" with is a dry oxidation at 1050 <sup>o</sup>C for 100 minutes and 20 minutes annealing. At the oxidation was the O<sub>2</sub> flow was 5 SLM, and the N<sub>2</sub> flow for annealing was 3 SLM.
The drive-in process was made in the Phosphorus Drive-in furnace (A3) for all the mentioned wafers same time. At the drive-in process a dummy wafer was placed in-between the wafers from different temperatures so doping from wafer to wafer was minimized. The drive-in was done with the process "DRY1050" with is a dry oxidation at 1050 <sup>o</sup>C for 100 minutes and 20 minutes annealing. At the oxidation was the O<sub>2</sub> flow was 5 SLM, and the N<sub>2</sub> flow for annealing was 3 SLM.


====Result====
====Result====
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|-
|-
! width="130" | Wafer #   
! width="130" | Wafer #   
! width="130" | Temperature [C]  
! width="130" | Temperature [<sup>o</sup>C]  
! width="130" | Thinkness [nm]
! width="130" | Thinkness [nm]
! width="130" | Refrative index
! width="130" | Refrative index
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|[[image:Resistivity.png|400x400px|right|thumb|Resistivity]]||[[image:Sheet_resistance.png|400x400px|right|thumb|Sheet resistance]]
|[[image:Resistivity.png|400x400px|right|thumb|Resistivity]]||[[image:Sheet_resistance.png|400x400px|right|thumb|Sheet resistance]]
|-
|-
|[[image:SIMS Measurement_After_Pre-dep.png|400x400px|right|thumb|SIMS Measurement After Pre-dep]]||[[image:SIMS Measurement_After_Drive-in_Process_at_1050_C.png|400x400px|right|thumb|SIMS Measurement After Drive-in Process at 1050 C]]
|[[image:SIMS Measurement_After_Pre-dep.png|400x400px|right|thumb|SIMS Measurement After Pre-dep]]||[[image:SIMS Measurement_After_Drive-in_Process_at_1050_C.png|400x400px|right|thumb|SIMS Measurement After Drive-in Process at 1050 <sup>o</sup>C]]
|-
|-
|}
|}


Looking at the 'SIMS Measurement after Drive-in Process at 1050 C' it can be seen that 'Pre-dep at 950 C' and 'Pre-dep at 1000 C' are crossing each other but they should not do that. There have only been meassured on one wafer so there is not that mush statistical data to verify it with.
Looking at the 'SIMS Measurement after Drive-in Process at 1050 <sup>o</sup>C it can be seen that 'Pre-dep at 950 <sup>o</sup>C and 'Pre-dep at 1000 <sup>o</sup>C are crossing each other but they should not do that. There have only been meassured on one wafer so there is not that mush statistical data to verify it with.
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