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LabAdviser/Technology Research/Fabrication of Hyperbolic Metamaterials using Atomic Layer Deposition/TiO2 Q plates: Difference between revisions

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Eves (talk | contribs)
DCH-Employees-701, NLAB-Employees-701, NLAB-LabmanagerAllUsers
4,346 edits
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|-
|-
!1.1
!1.1
|RCA clean
|RCA clean.
|Before Si deposition in LPCVD furnace, the quartz (fused silica) wafers need to be cleaned
|Before Si deposition in LPCVD furnace, the quartz (fused silica) wafers need to be cleaned
|[[Specific_Process_Knowledge/Wafer_cleaning/RCA| RCA]]
|[[Specific_Process_Knowledge/Wafer_cleaning/RCA| RCA]]
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|- style="background:#BCD4E6; color:black"
|- style="background:#BCD4E6; color:black"
!1.2
!1.2
|Low-Pressure Chemical Vapour Deposition (LPCVD) of Si
|Low-Pressure Chemical Vapour Deposition (LPCVD) of Si.
|LPCVD deposition of 300 nm amorphous Si
|LPCVD deposition of 300 nm amorphous Si
|[[Specific_Process_Knowledge/Thin_film_deposition/Furnace_LPCVD_PolySilicon| 6" LPCVD polysilicon furnace (E2)]].  
|[[Specific_Process_Knowledge/Thin_film_deposition/Furnace_LPCVD_PolySilicon| 6" LPCVD polysilicon furnace (E2)]].  
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|-
|-
!1.3
!1.3
|Si anisotropic wet etch  
|Si anisotropic wet etch.
|Removal of the Si from the back side of the wafer.
|Removal of the Si from the back side of the wafer.
| [[Specific_Process_Knowledge/Etch/KOH_Etch|KOH]].
| [[Specific_Process_Knowledge/Etch/KOH_Etch|KOH]].
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|- style="background:#BCD4E6; color:black"
|- style="background:#BCD4E6; color:black"
!1.4
!1.4
|Plasma surface treatment
|Plasma surface treatment.
|To ensure that all organic remainings are gone, wafer is treated by O<sub>2</sub>/N<sub>2</sub> plasma. (Optional step)
|To ensure that all organic remainings are gone, wafer is treated by O<sub>2</sub>/N<sub>2</sub> plasma. (Optional step)
|
|
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|-
|-
!1.5
!1.5
|E-Beam Lithography (EBL)
|E-Beam Lithography (EBL).
|Spin-coating of CSAR resist to the thickness of 150 nm, followed by e-beam exposure.
|Spin-coating of CSAR resist to the thickness of 150 nm, followed by e-beam exposure.
|
|
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|- style="background:#BCD4E6; color:black"
|- style="background:#BCD4E6; color:black"
!1.6
!1.6
|Advanced Silicon Etching
|Advanced Silicon Etching.
|Creating sacrificial silicon template.
|Creating sacrificial silicon template.
|
|
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|-
|-
!1.7
!1.7
|Scanning Electron Microscopy inspection
|Scanning Electron Microscopy inspection.
|The fabricated template inspects by SEM
|The fabricated template inspects by SEM
|
|
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|- style="background:#BCD4E6; color:black"
|- style="background:#BCD4E6; color:black"
!1.8
!1.8
|Plasma surface treatment
|Plasma surface treatment.
|To ensure that all organic remainings are gone, template is treated by O<sub>2</sub>/N<sub>2</sub> plasma. (Optional step)
|To ensure that all organic remainings are gone, template is treated by O<sub>2</sub>/N<sub>2</sub> plasma. (Optional step)
|
|
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|-
|-
!1.9
!1.9
|Atomic Layer Deposition (ALD) of TiO<sub>2</sub>
|Atomic Layer Deposition (ALD) of TiO<sub>2</sub>.
|Deposition carried at 150C.Thickness is approx. 90 nm.
|Deposition carried at 150C.Thickness is approx. 90 nm.
||Equipment used: [[Specific_Process_Knowledge/Thin_film_deposition/ALD_Picosun_R200|ALD Picosun R200]]. Standard recipe used: [[Specific_Process_Knowledge/Thin_film_deposition/ALD_Picosun_R200/TiO2_deposition_using_ALD#TiO2_deposition_on_trenches| TiO2T]] .
||Equipment used: [[Specific_Process_Knowledge/Thin_film_deposition/ALD_Picosun_R200|ALD Picosun R200]]. Standard recipe used: [[Specific_Process_Knowledge/Thin_film_deposition/ALD_Picosun_R200/TiO2_deposition_using_ALD#TiO2_deposition_on_trenches| TiO2T]] .
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|-
|-
!1.11
!1.11
|Scanning Electron Microscopy inspection
|Scanning Electron Microscopy inspection.
|SEM inspection of ALD deposition and IBE etching.
|SEM inspection of ALD deposition and IBE etching.
|
|
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|-
|-
!1.13
!1.13
|Scanning Electron Microscopy inspection of fabricated structure.
|Scanning Electron Microscopy inspection.
|Proof of final result.
|Proof of final result.
|
|
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