Specific Process Knowledge/Thin film deposition/Furnace LPCVD TEOS: Difference between revisions

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==Overview of the performance of LPCVD Silicon Nitride and some process related parameters==
==Overview of the performance of the LPCVD TEOS furnace and some process related parameters==


{| border="2" cellspacing="0" cellpadding="10"  
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!style="background:silver; color:black;" align="left"|Purpose  
!style="background:silver; color:black;" align="left"|Purpose  
|style="background:LightGrey; color:black"|Deposition of TEOS silicon oxide
|style="background:LightGrey; color:black"|
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Deposition of silicon oxide on silicon nitride
Deposition of TEOS - Silicon dioxide based on tetraethoxysilane
*Deposition of silicon oxide on structured surfaces, eg. to cover holes or sealing small cavities.
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!style="background:silver; color:black" align="left" valign="top" rowspan="3"|Performance
!style="background:silver; color:black" align="left" valign="top" rowspan="3"|Performance
|style="background:LightGrey; color:black"|Film thickness|
|style="background:LightGrey; color:black"|Film thickness
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Si<sub>3</sub>N<sub>4</sub>:~50Å - ~3000Å
*0 nm - 2000 nm
*SRN: ~50Å - ~10000Å
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|style="background:LightGrey; color:black"|Step coverage
|style="background:LightGrey; color:black"|Step coverage
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|style="background:LightGrey; color:black"|Process Temperature
|style="background:LightGrey; color:black"|Process Temperature
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*800-835 <sup>o</sup>C
*725 <sup>o</sup>C
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|style="background:LightGrey; color:black"|Process pressure
|style="background:LightGrey; color:black"|Process pressure
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*80-230 mTorr
*190 mTorr
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|style="background:LightGrey; color:black"|Gas flows
|style="background:LightGrey; color:black"|Gas flows
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|style="background:WhiteSmoke; color:black"|
*SiH<math>_2</math>Cl<math>_2</math>:10-100 sccm
*TEOS: 50 sccm
*NH<math>_3</math>:10-75 sccm
*O<math>_2</math>: 30 sccm
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!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Substrates
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Substrates
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| style="background:LightGrey; color:black"|Substrate material allowed
| style="background:LightGrey; color:black"|Substrate material allowed
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*Silicon wafers (new from the box or RCA cleaned)
*Silicon wafers (only clean wafers)
**with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
**with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
**from furnaces in stack A or B in cleanroom 2
*Quartz wafers (RCA cleaned)
*Quartz wafers (RCA cleaned)
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Revision as of 14:19, 26 July 2012

This page is in progress!!

LPCVD (Low Pressure Chemical Vapor Deposition) TEOS

B3 Furnace LPCVD TEOS. Positioned in cleanroom 2

Danchip has one LPCVD TEOS furnace (installed in 1995). The furnace is a Tempress horizontal furnace. The process is a batch process, where TEOS can be deposited on up to 15 wafer at a time.

TEOS is a silicon dioxide based on tetraethoxysilane. The reactive gas is TEOS, and the deposition takes place at a temperature of 725 degrees Celsius. It is possible to anneal the TEOS layer to improve the electrical properties as well as chemical resistance.

The LPCVD TEOS has a excellent step coverage and is very good for trench filling. The film thickness is very uniform over the wafer.

To get information on how to operate the furnace please read the user manual which is uploaded to LabManager.

Process Knowledge

Please take a look at the process side for deposition of TEOS oxide: Deposition of TEOS using LPCVD

Overview of the performance of the LPCVD TEOS furnace and some process related parameters

Purpose

Deposition of TEOS - Silicon dioxide based on tetraethoxysilane

Performance Film thickness
  • 0 nm - 2000 nm
Step coverage
  • Good
Film quality
  • Dense film
  • Few defects
Process parameter range Process Temperature
  • 725 oC
Process pressure
  • 190 mTorr
Gas flows
  • TEOS: 50 sccm
  • O: 30 sccm
Substrates Batch size
  • 1-25 4" wafer per run
  • Deposition on both sides of the substrate
Substrate material allowed
  • Silicon wafers (only clean wafers)
    • with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
    • from furnaces in stack A or B in cleanroom 2
  • Quartz wafers (RCA cleaned)