Specific Process Knowledge/Thin film deposition/Furnace LPCVD TEOS: Difference between revisions

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[[Category: Equipment|Thin film LPCVD TEOS]]
[[Category: Thin Film Deposition|LPCVD TEOS]]
[[Category: Furnaces|LPCVD TEOS]]
==LPCVD (Low Pressure Chemical Vapor Deposition) TEOS==
==LPCVD (Low Pressure Chemical Vapor Deposition) TEOS==
[[Image:160904_danchip_4538.jpg|300x300px|thumb|B3 Furnace LPCVD TEOS. Positioned in cleanroom 2]]
[[Image:160904_danchip_4538.jpg|300x300px|thumb|B3 Furnace LPCVD TEOS. Positioned in cleanroom B-1]]


Danchip has one LPCVD TEOS furnace (installed in 1995). The furnace is a Tempress horizontal furnace. The process is a batch process, where TEOS can be deposited on up to 15 wafer at a time.  
DTU Nanolab has one LPCVD TEOS furnace (installed in 1995). The furnace is a Tempress horizontal furnace. The process is a batch process, where TEOS can be deposited on up to 15 wafer at a time.  


TEOS is a silicon dioxide based on tetraethoxysilane. The reactive gas is TEOS, and the deposition takes place at a temperature of 725 <sup>o</sup>C. It is possible to anneal the TEOS layer to improve the electrical properties as well as chemical resistance.
TEOS is a silicon dioxide based on tetraethoxysilane. The reactive gas is TEOS, and the deposition takes place at a temperature of 712-720 <sup>o</sup>C (temperature variation over the furnace tube). It is possible to anneal the TEOS layer to improve the electrical properties as well as chemical resistance. The electrical characteristics may also be improved by the addition of O<sub>2</sub> during the deposition process.
 
The LPCVD TEOS has an excellent step coverage and is very good for trench filling. The film thickness is very uniform over each wafer.  


The LPCVD TEOS has a excellent step coverage and is very good for trench filling. The film thickness is very uniform over the wafer.


'''The user manual(s), quality control procedure(s) and results, technical information and contact information can be found in LabManager:'''
'''The user manual(s), quality control procedure(s) and results, technical information and contact information can be found in LabManager:'''


'''[http://www.labmanager.danchip.dtu.dk/function.php?module=Machine&view=view&mach=85 Bor Drive-in]'''
'''[http://www.labmanager.dtu.dk/function.php?module=Machine&view=view&mach=85 LPCVD TEOS furnace]'''
 
'''[https://labmanager.dtu.dk/d4Show.php?id=1926 Furnace computer manual]'''
 
 
== Manual for the furnace computer to the A, B, C and E stack furnaces ==
 
The A, B, C and E stack furnaces can be controlled either from a touch screen by each furnace or from a furnace computer. The user manual for the furnace computer can be found here:
 
[[media:Furnace_computer_manual.pdf|Manual for furnace computers for the A, B, C and E stack furnaces]]


==Process Knowledge==
==Process Knowledge==
Please take a look at the process side for deposition of TEOS oxide:
Please take a look at the process side for deposition of TEOS oxide:
[[Specific Process Knowledge/Thin film deposition/Deposition of TEOS/Deposition of TEOS using LPCVD|Deposition of TEOS using LPCVD]]
[[Specific Process Knowledge/Thin film deposition/Deposition of TEOS/Deposition of TEOS using LPCVD|Deposition of TEOS using LPCVD]]


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{| border="2" cellspacing="0" cellpadding="0"  
{| border="2" cellspacing="0" cellpadding="0"  
|-
|-
!style="background:silver; color:black;" align="left"|Purpose  
!style="background:silver; color:black;" align="center"|Purpose  
|style="background:LightGrey; color:black"|
|style="background:LightGrey; color:black"|
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
Deposition of TEOS - Silicon dioxide based on tetraethoxysilane  
Deposition of TEOS - Silicon dioxide based on tetraethoxysilane  
|-
|-
!style="background:silver; color:black" align="left" valign="top" rowspan="3"|Performance
!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Performance
|style="background:LightGrey; color:black"|Film thickness
|style="background:LightGrey; color:black"|Film thickness
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
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*Few defects
*Few defects
|-
|-
!style="background:silver; color:black" align="left" valign="top" rowspan="3"|Process parameter range
!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range
|style="background:LightGrey; color:black"|Process Temperature
|style="background:LightGrey; color:black"|Process Temperature
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*725 <sup>o</sup>C
*712-720 <sup>o</sup>C
|-
|-
|style="background:LightGrey; color:black"|Process pressure
|style="background:LightGrey; color:black"|Process pressure
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|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*TEOS: 50 sccm
*TEOS: 50 sccm
*O<math>_2</math>: 30 sccm
*O<sub>2</sub>: 0 sccm
|-
|-
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Substrates
!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Substrates
|style="background:LightGrey; color:black"|Batch size
|style="background:LightGrey; color:black"|Batch size
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
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| style="background:LightGrey; color:black"|Substrate material allowed
| style="background:LightGrey; color:black"|Substrate material allowed
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Silicon wafers (only clean wafers)
*Silicon wafers (only clean wafers and RCA cleaned)
**with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
**with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
**from furnaces in stack A or B in cleanroom 2  
**from furnaces in stack A or B in cleanroom 2  
*Quartz wafers (RCA cleaned)
*Quartz wafers (RCA cleaned)
*Silicon carbide sample(RCA cleaned)
|-  
|-  
|}
|}
== Rules for storage and RCA cleaning of wafers to the B3 furnace ==
*[[Specific_Process_Knowledge/Thermal_Process/Storage_and_cleaning_of_wafer_to_the_A,_B,_C_and_E_stack_furnaces|Storage and cleaning of wafer to the B3 furnace]]

Latest revision as of 13:19, 26 June 2023

Feedback to this page: click here

Unless otherwise stated, this page is written by DTU Nanolab internal

LPCVD (Low Pressure Chemical Vapor Deposition) TEOS

B3 Furnace LPCVD TEOS. Positioned in cleanroom B-1

DTU Nanolab has one LPCVD TEOS furnace (installed in 1995). The furnace is a Tempress horizontal furnace. The process is a batch process, where TEOS can be deposited on up to 15 wafer at a time.

TEOS is a silicon dioxide based on tetraethoxysilane. The reactive gas is TEOS, and the deposition takes place at a temperature of 712-720 oC (temperature variation over the furnace tube). It is possible to anneal the TEOS layer to improve the electrical properties as well as chemical resistance. The electrical characteristics may also be improved by the addition of O2 during the deposition process.

The LPCVD TEOS has an excellent step coverage and is very good for trench filling. The film thickness is very uniform over each wafer.


The user manual(s), quality control procedure(s) and results, technical information and contact information can be found in LabManager:

LPCVD TEOS furnace

Furnace computer manual


Manual for the furnace computer to the A, B, C and E stack furnaces

The A, B, C and E stack furnaces can be controlled either from a touch screen by each furnace or from a furnace computer. The user manual for the furnace computer can be found here:

Manual for furnace computers for the A, B, C and E stack furnaces

Process Knowledge

Please take a look at the process side for deposition of TEOS oxide:

Deposition of TEOS using LPCVD


Overview of the performance of the LPCVD TEOS furnace and some process related parameters

Purpose

Deposition of TEOS - Silicon dioxide based on tetraethoxysilane

Performance Film thickness
  • 0 nm - 2000 nm
Step coverage
  • Good
Film quality
  • Dense film
  • Few defects
Process parameter range Process Temperature
  • 712-720 oC
Process pressure
  • 190 mTorr
Gas flows
  • TEOS: 50 sccm
  • O2: 0 sccm
Substrates Batch size
  • 1-15 4" wafers per run
  • Deposition on both sides of the substrate
Substrate material allowed
  • Silicon wafers (only clean wafers and RCA cleaned)
    • with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
    • from furnaces in stack A or B in cleanroom 2
  • Quartz wafers (RCA cleaned)
  • Silicon carbide sample(RCA cleaned)


Rules for storage and RCA cleaning of wafers to the B3 furnace