Specific Process Knowledge/Lithography/Aligners/Aligner: Maskless 01 processing: Difference between revisions
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When aligning on Aligner: Maskless 01, you should either: | When aligning on Aligner: Maskless 01, you should either: | ||
* Use only 2 alignment marks and apply rotation correction | * Use only 2 alignment marks and apply rotation correction (for patterns printed on MLA1) | ||
* Use 3+ alignment marks and apply all corrections | * Use 3+ alignment marks and apply all corrections: rotation, scaling and shearing (for patterns printed on other tools) | ||
<span style="color:red">If 3+ marks are used, but scaling and shearing is not applied, ''significant'' misalignment will be observed, even on chips. On a 4" wafer the shift in Y can be several hundred µm.</span> | <span style="color:red">If 3+ marks are used, but scaling and shearing is not applied, ''significant'' misalignment will be observed, even on chips. On a 4" wafer the shift in Y can be several hundred µm.</span> | ||
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After installation, multiple tests were conducted in order to assess the overlay accuracy of Aligner: Maskless 01. The conclusion to the early tests were that the stage accuracy is ±0.1µm, and the machine-to-self overlay accuracy is ±0.5µm. The machine-to-machine overlay accuracy was not determined (due to the lack of a suitable mask for the mask aligners). In 2019, efforts to establish regular QC of the equipment were started, and the accuracy of the alignment mark detection has been measured regularly since 2020. While both the average and the spread of the alignment errors for the x-axis (measured in 3x3 positions covering a 60x60mm<sup>2</sup> area) has consistently been within the ±1µm specification of the machine, the spread of the alignment errors for the y-axis is typically 3±1µm, despite the average error being in spec, due to negative offsets on the upper half of the wafer and positive offsets on the lower. In 2025, it was decided to investigate this problem further, in order to determine whether a specific alignment protocol could remedy the alignment error, or whether the acceptance limits for the QC would have to be changed. | After installation, multiple tests were conducted in order to assess the overlay accuracy of Aligner: Maskless 01. The conclusion to the early tests were that the stage accuracy is ±0.1µm, and the machine-to-self overlay accuracy is ±0.5µm. The machine-to-machine overlay accuracy was not determined (due to the lack of a suitable mask for the mask aligners). In 2019, efforts to establish regular QC of the equipment were started, and the accuracy of the alignment mark detection has been measured regularly since 2020. While both the average and the spread of the alignment errors for the x-axis (measured in 3x3 positions covering a 60x60mm<sup>2</sup> area) has consistently been within the ±1µm specification of the machine, the spread of the alignment errors for the y-axis is typically 3±1µm, despite the average error being in spec, due to negative offsets on the upper half of the wafer and positive offsets on the lower. In 2025, it was decided to investigate this problem further, in order to determine whether a specific alignment protocol could remedy the alignment error, or whether the acceptance limits for the QC would have to be changed. | ||
The result of these tests suggest that when aligning to a pattern exposed using MLA1, only 2 alignment marks on the X-axis should be used. If the first pattern was exposed using a different tool, 4 alignment marks must be used (with all corrections applied), but the alignment accuracy in Y-direction suffers. The Y-shift grows linearly with the size of the pattern/sample, so small samples will be less affected, while full wafers will experience shifts in Y that far exceed the ±1µm specification. In general, larger alignment error in Y must be accepted when aligning to a pattern exposed on a different tool. By scaling the design 40ppm in Y, however, it is possible to compensate for the Y-shift and achieve alignment within the machine specification across an entire wafer. | The result of these tests suggest that when aligning to a pattern exposed using MLA1, only 2 alignment marks on the X-axis should be used. If the first pattern was exposed using a different tool, 4 alignment marks must be used (with all corrections applied), but the alignment accuracy in Y-direction suffers. The Y-shift grows linearly with the size of the pattern/sample, so small samples will be less affected, while full wafers will experience shifts in Y that far exceed the ±1µm specification. In general, larger alignment error in Y must be accepted when aligning to a pattern exposed on a different tool. By scaling the design 40ppm in Y, however, it is possible to compensate for the Y-shift and achieve alignment within the machine specification across an entire wafer. Based on these results, it was decided to change the QC procedure to use only two alignment marks on the X-axis, but to keep the QC limits at ±1µm. In order to reflect the tolerance needed when using the machine, the alignment accuracy listed in the equipment performance will be changed to ±2µm. | ||
In the MLA1-MLA1 alignment tests, the design consists of ±5µm verniers with 0.1µm resolution along the X and Y axis placed in a 3 by 3 matrix covering a 60mm by 60mm area centered on the wafer. The sample is loaded, and the first layer with linear scales is printed (without global angle). Without unloading, the second layer with vernier scales is printed on top of the first, and then the sample is developed. The deviations (±) given for the results here are calculated as half the range of measurements. If the range is small, the measurement uncertainty is used instead. | In the '''MLA1-MLA1 alignment tests''', the design consists of ±5µm verniers with 0.1µm resolution along the X and Y axis placed in a 3 by 3 matrix covering a 60mm by 60mm area centered on the wafer. The sample is loaded, and the first layer with linear scales is printed (without global angle). Without unloading, the second layer with vernier scales is printed on top of the first, and then the sample is developed. The deviations (±) given for the results here are calculated as half the range of measurements. If the range is small, the measurement uncertainty is used instead. | ||
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In the MLA3-MLA1 alignment tests, the design consists of ±5µm verniers with 0.25µm resolution along the X and Y axis placed in a 3 by 3 matrix covering a 60mm by 60mm area centered on the wafer. The first layer with linear scales was printed in MLA3 as QC test wafers a long time ago and subsequently patterned using lift-off of gold. These wafers are coated with resist, the second layer with vernier scales is printed in MLA1, and then the sample is developed. The deviations (±) given for the results here are calculated as half the range of measurements. If the range is small, the measurement uncertainty is used instead. | In the '''MLA3-MLA1 alignment tests''', the design consists of ±5µm verniers with 0.25µm resolution along the X and Y axis placed in a 3 by 3 matrix covering a 60mm by 60mm area centered on the wafer. The first layer with linear scales was printed in MLA3 as QC test wafers a long time ago and subsequently patterned using lift-off of gold. These wafers are coated with resist, the second layer with vernier scales is printed in MLA1, and then the sample is developed. The deviations (±) given for the results here are calculated as half the range of measurements. If the range is small, the measurement uncertainty is used instead. | ||
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The alignment test with 4 alignment marks shows a +40ppm scaling on the X-axis, as well as a 0.1mRad shearing of the axes. The result is a decent alignment in X, but a shift in Y as well as a relatively large deviation. The raw data shows the deviation in Y is due to a -40ppm scaling along the Y-axis, as seen in the MLA1-MLA1 test with 4 marks, suggesting that the scaling in Y is consistently overestimated. | The alignment test with 4 alignment marks shows a +40ppm scaling on the X-axis, as well as a 0.1mRad shearing of the axes. The result is a decent alignment in X, but a shift in Y as well as a relatively large deviation. The raw data shows the deviation in Y is due to a -40ppm scaling along the Y-axis, as seen in the MLA1-MLA1 test with 4 marks, suggesting that the scaling in Y is consistently overestimated. This is probably also why attempts to use field alignment on structures printed using a different tool always fail at the outer positions. | ||
<br>Aligning using only 2 marks yields acceptable shifts in the center of the wafer, but very large shifts in X towards the edges, as evidenced by the 7.4µm deviation in X. The raw data suggests that this deviation is mainly due to a 0.2mRad tilt in the Y-axis, which corresponds well with the 0.1mRad shearing measured using 4 marks. There is also a (-)40ppm scaling along the X-axis, again similar to what was measured during 4 mark alignment. Even a 5mm chip would be affected by the 0.2mRad tilt, so clearly 4 mark alignment is needed when aligning to a pattern that was not exposed using MLA1. | <br>Aligning using only 2 marks yields acceptable shifts in the center of the wafer, but very large shifts in X towards the edges, as evidenced by the 7.4µm deviation in X. The raw data suggests that this deviation is mainly due to a 0.2mRad tilt in the Y-axis, which corresponds well with the 0.1mRad shearing measured using 4 marks. There is also a (-)40ppm scaling along the X-axis, again similar to what was measured during 4 mark alignment. Even a 5mm chip would be affected by the 0.2mRad tilt, so clearly 4 mark alignment is needed when aligning to a pattern that was not exposed using MLA1. | ||
<br>Attempting to fix the shift in Y when using 4 alignment marks by adding 0;0 as the first mark makes no difference. And the success from the MLA1-MLA1 test when using 3 marks on the bottom half of the wafer is unfortunately not repeated for MLA3-MLA1 alignment. Using alignment marks on the top half of the wafer also doesn't change the shift. The raw data from all the alignment tests using scaling and shearing compensation (3+ marks) shows the best alignment at the bottom of the wafer, with an increasing shift in Y due to a scaling error around -40ppm. Reducing the exposed area reduces the shift in Y, but the raw data show the same trend as the large area; best alignment at the bottom of the exposed area and a scaling error in Y around -40ppm. | <br>Attempting to fix the shift in Y when using 4 alignment marks by adding 0;0 as the first mark makes no difference. And the success from the MLA1-MLA1 test when using 3 marks on the bottom half of the wafer is unfortunately not repeated for MLA3-MLA1 alignment. Using alignment marks on the top half of the wafer also doesn't change the shift. The raw data from all the alignment tests using scaling and shearing compensation (3+ marks) shows the best alignment at the bottom of the wafer, with an increasing shift in Y due to a scaling error around -40ppm. Reducing the exposed area reduces the shift in Y, but the raw data show the same trend as the large area; best alignment at the bottom of the exposed area and a scaling error in Y around -40ppm. | ||