Specific Process Knowledge/Etch/ICP Metal Etcher: Difference between revisions

From LabAdviser
Jml (talk | contribs)
Bghe (talk | contribs)
No edit summary
 
(188 intermediate revisions by 4 users not shown)
Line 1: Line 1:
==Etching of nanostructures in silicon using the ICP Metal Etcher==
'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/ICP_Metal_Etcher click here]'''
<!--Page reviewed by jmli 9/8-2022  -->


[[Category: Equipment |Etch ICP Metal]]
[[Category: Etch (Dry) Equipment|ICP metal]]


== The ICP Metal Etcher ==


{| border="2" cellpadding="2" cellspacing="1"  
[[Image:ICP-Metal-Etcher.jpg |300x300px|thumb|The SPTS ICP Metal Etcher in the DTU Nanolab cleanroom B-1]]
|+ '''The starting point'''
 
Name: PRO ICP <br>
Vendor: STS (now SPTS) <br>
The ICP Metal Etcher allows you to dry etch a small set of metals that includes aluminium, titanium, chromium, titanium tungsten and molybdenum (along with the related oxides and nitrides). It is, despite its name, strictly forbidden to etch (or expose to plasma) other metals. In order to do so use the [[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]].
 
'''The user manual, user APV and contact information can be found in LabManager:'''
 
Equipment info in [http://labmanager.dtu.dk/function.php?module=Machine&view=view&mach=266 LabManager]
 
==Process information==
 
'''Standard recipes'''
 
*[[Specific Process Knowledge/Etch/ICP Metal Etcher/Aluminium|Etch of aluminium]]
*[[Specific Process Knowledge/Etch/ICP Metal Etcher/Titanium|Etch of titanium]]
*[[Specific Process Knowledge/Etch/ICP Metal Etcher/Chromium|Etch of chromium]]
 
'''Other etch recipes'''
*[[Specific Process Knowledge/Etch/ICP Metal Etcher/Barc Etch|Barc Etch]]
*[[Specific Process Knowledge/Etch/ICP Metal Etcher/silicon|Etch of silicon]]
*[[Specific Process Knowledge/Etch/ICP Metal Etcher/silicon oxide|Etch of silicon oxide]]
*[[Specific Process Knowledge/Etch/ICP Metal Etcher/silicon nitride|Etch of silicon nitride]]
*[[Specific Process Knowledge/Etch/Titanium Oxide/ICP metal|Etch of Titanium Oxide]]
*[[Specific Process Knowledge/Etch/Aluminum Oxide/Al2O3 Etch with ICP Metal|Al<sub>2</sub>O<sub>3</sub> Etch]]
 
'''End point detection'''
*[[/Examples of End point detection|Examples of End point detection]]
 
 
==An overview of the performance of the ICP Metal Etcher and some process related parameters==
 
{| border="2" cellspacing="0" cellpadding="2"  
|-
|-
! rowspan="6" align="center"| Break
!style="background:silver; color:black;" align="left"|Purpose
| Gas
|style="background:LightGrey; color:black"|Dry etch of
| Cl<sub>2</sub> 20 sccm
|style="background:WhiteSmoke; color:black"|
* Metals such as aluminium, chromium and titanium and the related oxides and nitrides
* Metals such as molybdenum, tungsten, titanium tungsten
|-
|-
| Pressure
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Performance
| 2 mTorr, Strike 3 secs @ 5 mTorr
|style="background:LightGrey; color:black"|Etch rates
|style="background:WhiteSmoke; color:black"|
* Aluminium : ~350 nm/min (depending on features size and etch load)
|-
|-
| Power
|style="background:LightGrey; color:black"|Anisotropy
| 600 W CP, 200 W PP
|style="background:WhiteSmoke; color:black"|
|-
*Good
| Temperature
| 20 degs
|-
|-
| Hardware
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Process parameter range
| 100 mm Spacers
|style="background:LightGrey; color:black"|Process pressure
|style="background:WhiteSmoke; color:black"|
*~0.1-95 mTorr
|-
|-
| Time
|style="background:LightGrey; color:black"|Gas flows
| 15 secs
|style="background:WhiteSmoke; color:black"|
{|
| SF<sub>6</sub>: 0-100 sccm
| O<sub>2</sub>: 0-100 sccm
|-
|-
! rowspan="6" align="center"| Main
| C<sub>4</sub>F<sub>8</sub>: 0-100 sccm
| Gas
| Ar: 0-300 sccm
| HBr 20 sccm
|-
|-
| Pressure
| CF<sub>4</sub>: 0-100 sccm
| 2 mTorr, Strike 3 secs @ 5 mTorr
| H<sub>2</sub>: 0-30 sccm
|-
|-
| Power
| CH<sub>4</sub>: not working
| 900 W CP, 50 W PP
| BCl<sub>3</sub>: 0-90 sccm
|-  
| Temperature
| 20 degs
|-
|-
| Hardware
| Cl<sub>2</sub>: 0-100 sccm
| 100 mm Spacers
| HBr: 0-100 sccm
|}
|-
|-
| Time
!style="background:silver; color:black" align="left" valign="top" rowspan="3"|Substrates
| ? secs
|style="background:LightGrey; color:black"|Batch size
|style="background:WhiteSmoke; color:black"|
*1 6" wafer per run
*1 4" wafer per run
*1 2" wafer per run
*Or several smaller pieces on a carrier wafer
|-
|-
| style="background:LightGrey; color:black"|Substrate material allowed
|style="background:WhiteSmoke; color:black"|
*Silicon wafers
**with layers of silicon oxide or silicon (oxy)nitride
*Quartz wafers
|-
| style="background:LightGrey; color:black"|Possible masking material
|style="background:WhiteSmoke; color:black"|
*Photoresist/e-beam resist
*PolySilicon, Silicon oxide or silicon (oxy)nitride
*Aluminium, titanium or chromium
|-
|}
|}
ER 200 nm/min,  3:1 over resist.  Vertical profile.  To improve selectivity to oxide under-layers you can add a small amount of O2  ( e.g 2 sccm  if the MFC is small enough).    This should not give an undercut.
<gallery caption="First tests of the nanoetch recipe" widths="300px" heights="300px" perrow="2">
Image:WF 2F-6_dec092010-30_nm.jpg|The 30 nm trenches are somewhat wider due to overexposure of E-beam resist
image:WF 2F-6_dec092010-120_nm.jpg|The 30 nm trenches are somewhat wider due to overexposure of E-beam resist
</gallery>
It looks like the trenches are closing up as the etch goes deeper, consistent with too much polymer deposition on the sidewall.
The options I would look at are
        1) to reduce the coil power to 700W so that the dc bias of the etch increases & you sputter more of the polymer off.
        2) increase the platen temperature to 40 C so as to reduce polymer condensation on the wafer.
        3) substitute Cl2 for some of the HBr - try a 50: 50 mix of Cl2 / HBr for the main etch with the same total gas flow.  This will reduce the amount      of polymerising species in the plasma & therefore help reduce the amount of sidewall deposition.  I would try these separately.
Just as a sanity check, have you got any pre-etch SEM images of the ZEP?  There's a contradiction in the SEM images  - in that you are seeing what looks to be undercut, whilst the trenches are also closing up.  One effect is consistent with too little polymerisation whilst the other is caused by too much.  The breakthrough step is actually quite a physical & directional etch, which usually doesn't cause an undercut.  What exposed area do you have on the samples?

Latest revision as of 09:37, 24 April 2023

Feedback to this page: click here

The ICP Metal Etcher

The SPTS ICP Metal Etcher in the DTU Nanolab cleanroom B-1

Name: PRO ICP
Vendor: STS (now SPTS)
The ICP Metal Etcher allows you to dry etch a small set of metals that includes aluminium, titanium, chromium, titanium tungsten and molybdenum (along with the related oxides and nitrides). It is, despite its name, strictly forbidden to etch (or expose to plasma) other metals. In order to do so use the IBE/IBSD Ionfab 300.

The user manual, user APV and contact information can be found in LabManager:

Equipment info in LabManager

Process information

Standard recipes

Other etch recipes

End point detection


An overview of the performance of the ICP Metal Etcher and some process related parameters

Purpose Dry etch of
  • Metals such as aluminium, chromium and titanium and the related oxides and nitrides
  • Metals such as molybdenum, tungsten, titanium tungsten
Performance Etch rates
  • Aluminium : ~350 nm/min (depending on features size and etch load)
Anisotropy
  • Good
Process parameter range Process pressure
  • ~0.1-95 mTorr
Gas flows
SF6: 0-100 sccm O2: 0-100 sccm
C4F8: 0-100 sccm Ar: 0-300 sccm
CF4: 0-100 sccm H2: 0-30 sccm
CH4: not working BCl3: 0-90 sccm
Cl2: 0-100 sccm HBr: 0-100 sccm
Substrates Batch size
  • 1 6" wafer per run
  • 1 4" wafer per run
  • 1 2" wafer per run
  • Or several smaller pieces on a carrier wafer
Substrate material allowed
  • Silicon wafers
    • with layers of silicon oxide or silicon (oxy)nitride
  • Quartz wafers
Possible masking material
  • Photoresist/e-beam resist
  • PolySilicon, Silicon oxide or silicon (oxy)nitride
  • Aluminium, titanium or chromium