Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using AOE/PolySi mask

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This page is written by Berit Herstrøm @ DTU Nanolab (BGHE) if nothing else is stated

High etch rate recipe

Parameter	Recipe name: SiO2_psi (SiO2 etch with pSi mask)
Coil Power [W]	1300
Platen Power [W]	500
Platen temperature [oC]	60
He flow [sccm]	300
C4F8 flow [sccm]	18
H2 flow [sccm]	0
Pressure [mTorr]	4

Typical results	PolySi mask - tested by Yunhong Ding @fotonik	PolySi mask - tested Feb. 2012 by bghe@nanolab
Etch rate	~0.55 µm/min	0.50 µm/min
Selectivity	1:~10	1:17
SiO2 etch uniformity	not tested	±4.5% over a 100mm wafer
Profile [o]	not tested	see images
Images	.	See here
Comments	.	Line width reduction is about 2.5µm when etching 12.5µm down. See the images to get more info on this.

Low line width reduction recipe

It is difficult to get very low line width reduction using P-Si as masking material. This is due to the fact that the etch gas C4F8 that is used to etch SiO2 also etches Si very well. The best result so far is given here:

Parameter	Poly Si mask	MLO_psi
Coil Power [W]	1100	1100
Platen Power [W]	170	170
Platen temperature [oC]	50	50
He flow [sccm]	450	450
C4F8 flow [sccm]	12	12
H2 flow [sccm]	0	0
Pressure [mTorr]	6	6
Spacer settings [mm]	100	0

Typical results	PolySi mask - tested spring. 2012 by bge@anolab	MLP_psi tested by Martin Lind Ommen @Nanotech, Fall 2016
Etch rate	~0.25 µm/min	244 nm/min
Selectivity pSi:SiO2	1:12	1:5.4
SiO2 etch uniformity	±1.1% over a 100mm wafer
Profile [o]	see images
Images	See here
Comments	Line width reduction is about 1µm when etching 7.5µm down. See the images to get more info on this

Good wafer uniformity recipe

This recipe has not been optimized to get as uniformity as possible but was just the one with the lowest non-uniformity among the recipes I have tested.

Parameter	Poly Si mask
Coil Power [W]	1300
Platen Power [W]	350
Platen temperature [oC]	60
He flow [sccm]	450
C4F8 flow [sccm]	18
H2 flow [sccm]	7
Pressure [mTorr]	8
Spacer settings [mm]	0

Typical results	PolySi mask - tested spring. 2012 by bge@anolab
Etch rate	~0.40 µm/min
Selectivity	1:10
SiO2 etch uniformity (±(max-min/2*avg)	±0.54% over a 100mm wafer
Profile [o]	see images
Images	See here
Comments	Line width reduction is about 3µm when etching 14µm down. See the images to get more info on this

High selectivity to Si-mask recipe

This recipe has not been optimize to get as good selectivity as possible but was just the one with the highest selectivity among the recipes I have tested.

Parameter	Poly Si mask (M_PSI_4)
Coil Power [W]	1300
Platen Power [W]	350
Platen temperature [oC]	20
He flow [sccm]	450
C$_{4}$F$_{8}$ flow [sccm]	18
H$_{2}$ flow [sccm]	7
Pressure [mTorr]	8
Spacer settings [mm]	0

Typical results	PolySi mask - tested spring. 2012 by bge@nanolab
Etch rate	~0.43 µm/min
Selectivity	1:24
SiO2 etch uniformity	±2.2% over a 100mm wafer
Profile [o]	see images
Images	See here
Comments	Line width reduction is about 3µm when etching 13µm down. See the images to get more info on this