Specific Process Knowledge/Thermal Process/Annealing
Annealing
At Danchip we have seven furnaces and an RTP for annealing: A1,A3,C1,C2,C3,C4, noble furnace and RTP. Annealing normally takes place in an N2 atmosphere. PECVD PBSG is annealed in an wet atmosphere which will also oxidize the silicon substrate.
- Anneal with N2 can be done in furnaces:A1,A3,C1,C2,C3,C4, noble furnace and RTP
- Wet anneal with H2O in a bubbler can be done in furnaces:C2 and C3.
Comparison of the seven annealing equipments
| A1 Boron drive-in |
A3 Phosphorous drive-in |
C1 Anneal oxide |
C2 Gate oxide |
C3 Anneal bond |
C4 Anneal aluminium |
Nobel furnace | RTP | |
| General description | Drive-in of boron deposited in the boron pre-dep furnace(A2) or drive-in of ion implanted boron. Can also be used for oxidation. | Drive-in of phosphorous deposited in the phosphorous pre-dep furnace(A2) or drive-in of ion implanted phosphorous. Can also be used for oxidation. | Annealing and oxidation of wafers from the B-stack and PECVD1. At the moment also used for general annealing and oxidation of 6" wafers. | Oxidation of gate-oxide and other especially clean oxides. | Annealing and oxidation of wafers from NIL. | Annealing of wafers with aluminium. | Annealing and oxidation of any material. | Rapid thermal annealing. |
|---|---|---|---|---|---|---|---|---|
| Annealing with N2 | x | x | x | x (with special permission) | x | x | x | x |
| Wet annealing with bubler (water steam + N2) | . | . | x | . | x | . | . | . |
| Process temperature [ oC ] | 800-1150 | 800-1150 | 800-1150 | 800-1150 | 800-1150 | 800-1150 | 22-1000oC | ? |
| Batch size | max. 30 wafers of 4" or 2" | max. 30 4" wafers or 2" wafers | max. 30 wafers of 6",4" or 2" | max. 30 4" wafers or 2" wafers | max. 30 4" wafers or 2" wafers | max. 30 4" wafers or 2" wafers | 30x4" or small pieces | ? |
| Which wafers are allowed to enter the furnace: | A1 Boron drive-in |
A3 Phosphorous drive-in |
C1 Anneal oxide |
C2 Gate oxide |
C3 Anneal bond |
C4 Anneal aluminium |
Nobel | RTP |
| New clean* Si wafers 4" (6" in C1) | x | x | x | x (with special permission) | x | x | x | x |
| RCA clean** Si wafers with no history of Metals on | x | x | x | x (with special permission) | x | x | x | x |
| From Predep furnace directly (e.g. incl. Predep HF**) | From A2 | From A4 | x | . | x | x | x | x |
| Wafers directly from PECVD1 | . | . | x | . | x | x | x | x |
| Wafers directly from NIL bonding | . | . | . | . | x | x | x | x |
| Wafers with aluminium | . | . | . | . | . | x | x | . |
| wafers with other metals | . | . | . | . | . | . | x | . |
| wafers with III-V materials | x |
*New clean: only right from the new clean box. It is not allowed to put them in another box first.
**These wafers must be placed in a "transport box from RCA to furnace" using the RCA carrier when doing RCA or the pre-dep carrier after pre-dep.