Specific Process Knowledge/Etch/Etching of Silicon/Si etch using RIE1 or RIE2
RIE (Reactive Ion Etch) can be used for etching silicon - both crystalline and polycrystalline silicon. The etch can be isotropic or anisotropic with vertical sidewalls depending on the process recipe and the masking material and geometry. The Si is etched by flour radicals that are created from SF6(g) in a RF generated plasma.
Most used recipe (this recipe is being watched in the in the quality assurance program):
Hint: When using resist as masking material then do a 15 sec. buffer dip before the etch to remove any residual of resist which is normally left after the photo lithography step. A short O2 plasma will also do.
Recipe: | OH_POLYA |
---|---|
SF6 flow | 32 sccm |
O2 flow | 8 sccm |
Pressure | 80 mTorr |
RF-power | 30 W |
Expected results in RIE1 | Expected results in RIE2 | |
---|---|---|
Etch rate in Si | ~0.40 µm/min | ~0.45 µm/min |
Etch rate in Si3N4 | . | ~0.05 µm/min |
Etch rate in SiO2 | . | ~0.02 µm/min |
Etch rate in photoresist | ~0.06 µm/min | ~0.05 µm/min |
The mask load affects the results
The etching results are dependent on the mask geometry primarily the etch load (meaning the area fraction of the silicon substrate that is exposed to the plasma). To illustrate that you can see on the images below the effect of mask load on the results of the OH_PolyA recipe. The first one has a very low load of 1-10% and the second has a load of 50%. It can be seen that the sidewalls are closer to vertical with 50% load than with 1-10 % load. Also the etch rate is effected by the load.
Mask load <50%:
- The etch rate is approximately the same.
- The etch profile is more isotropic
Mask load >50%:
- The etch rate decreases almost linear with the exposed area. The etch rate of a 100% load has once been seen to be reduced to about 65% of the etch rate of a 60% load.
- The etch profile is not expected to change significantly.
Etch of small structures
RIE1:
A Design Of Experiment (DOE) has been performed. Here is a short summary:
Recipe: | |
---|---|
SF6 flow | 30 sccm |
O2 flow | 20-29 sccm |
CHF3 flow | 5-15 scmm |
Pressure | 31-41 mTorr |
RF-power | 20 W |
More details on the DOE can be seen here: "DOE RIE1 silicon etch of small structures" Media:RIE1_of_Silicon_20070306.pdf (not available yet).
Here are a few images of some of the single experiments in the DOE. The width of the trenches are roughly 1.5µm:
RIE2:
A Design Of Experiment (DOE) has been performed. Here is a short summary:
Recipe: | |
---|---|
SF6 flow | 30 sccm |
O2 flow | 20-29 sccm |
CHF3 flow | 5-15 scmm |
Pressure | 36 mTorr |
RF-power | 20 W |
More details on the DOE can be seen here: "DOE RIE2 silicon etch of small structures" (not available yet).
Here are a few images of some of the single experiments in the DOE. The width of the trenches are roughly 1.5µm: