This page was written by Evgeniy Shkondin, DTU Nanolab, unless otherwise stated.
All images and photographs on this page belong to DTU Nanolab.
The fabrication and characterization described below were conducted in 2026 by Evgeniy Shkondin, DTU Nanolab.

Vanadium Silicide RF-DC Co-Sputtering

This document presents the results of vanadium silicide (V₃Si) deposition by RF-DC co-sputtering in the Sputter-System Metal-Oxide (PC1), commonly referred to as the “Cluster Lesker.” A 3-inch V target was mounted in Source #5 (DC/p-DC), and a 3-inch Si target was mounted in Source #1 (RF).

Vanadium forms several silicide compounds. V₃Si is especially interesting because it has the cubic A15 structure and is a metallic, multiband superconductor with a bulk transition temperature of approximately 16-17 K. Its properties are sensitive to composition, atomic ordering, crystalline quality, strain, defects and oxidation.

The films were characterized by X-ray reflectivity (XRR), grazing-incidence X-ray diffraction (GiXRD), X-ray photoelectron spectroscopy (XPS), valence-band XPS, reflection electron energy-loss spectroscopy (REELS), scanning electron microscopy (SEM) and electrical measurements. This shortened page presents the deposition, complete XRR analysis and a concise GiXRD summary.

Substrates used: 150 mm Si wafers with 300 nm thermal SiO₂.

The following PC1 process recipes were used:

MD Co-sputtering_PC1_Src1_Src5_RF_DC
MD Co-sputtering_PC1_Src1_Src5_RF_DC and RF bias

Deposition type: RF-DC co-sputtering (upstream)
Si source power: 120 W RF
V source power: 145 W DC
Pressure: 3 mTorr
RF substrate bias, when used: 30 W
Deposition time: 1600 s
Substrate temperatures: room temperature, 300°C, 400°C and 500°C

Deposition conditions

Power calibration and choice of V:Si ratio

To prepare V₃Si by co-sputtering, the deposition rates of pure Si and pure V were first measured separately. The required ratio between the two thickness rates is not 3:1. V₃Si contains three V atoms for one Si atom, but the two elements have different densities and molar masses; therefore, pure-element thickness rates must be converted to an estimated atomic arrival-rate ratio.

For an elemental sputter source, the atomic flux is proportional to:

$Φ_{i} \propto \frac{ρ_{i} r_{i}}{M_{i}}$

where $ρ_{i}$ is the density of the element, $r_{i}$ is the deposited thickness rate, and $M_{i}$ is the molar mass.

For stoichiometric V₃Si, the desired atomic ratio is:

$\frac{Φ_{V}}{Φ_{S i}} = 3$

This gives:

$\frac{r_{V}}{r_{S i}} = 3 \cdot \frac{M_{V} / ρ_{V}}{M_{S i} / ρ_{S i}}$

Using:

$M_{V} = 50.94$ g/mol
$ρ_{V} = 6.11$ g/cm³
$M_{S i} = 28.09$ g/mol
$ρ_{S i} = 2.33$ g/cm³

the required pure-material thickness-rate ratio becomes approximately:

$\frac{r_{V}}{r_{S i}} \approx 2.07$

Thus, under the assumptions of bulk elemental density, equal sticking probability and transferable single-target calibrations, the pure V thickness rate should be approximately 2.1 times the pure Si thickness rate. A slightly V-rich starting condition was selected to reduce the risk of Si-rich secondary phases such as VSi₂:

$\frac{r_{V}}{r_{S i}} \approx 2.2 - 2.3$

The measured Si deposition rate at 120 W RF was:

$r_{S i} = 0.029 n m / s$

Therefore, the required V deposition rate is:

$r_{V} = (2.2 - 2.3) \cdot 0.029$

or approximately:

$r_{V} = 0.064 - 0.067 n m / s$

The measured V deposition rate at 190 W DC was:

$r_{V} (190 W) = 0.087 n m / s$

Assuming an approximately linear dependence of V deposition rate on DC power in this power range, the required V power is:

$P_{V} = 190 \cdot \frac{0.064 - 0.067}{0.087}$

which gives:

$P_{V} \approx 140 - 146 W$

Therefore, the co-sputtering condition selected for this test was:

Si: 120 W RF
V: 145 W DC

This calibration predicts a slightly V-rich arrival ratio relative to ideal V₃Si. It is an initial process estimate, not a direct composition measurement: sputtered-film density, angular distribution, sticking, re-sputtering and source interaction can all make the actual film composition differ from this calculation. The estimated pure-material V rate at 145 W is:

$r_{V} (145 W) = 0.087 \cdot \frac{145}{190} = 0.066 n m / s$

The corresponding pure-material thickness-rate ratio is:

$\frac{r_{V}}{r_{S i}} = \frac{0.066}{0.029} \approx 2.3$

This is close to the intended slightly V-rich process window. XRD and composition measurements are still required to determine whether the deposited film is V₃Si-dominant and whether the near-surface composition is representative of the film bulk.

V₃Si RF-DC co-sputtering deposition conditions

Deposition conditions using RF-DC co-sputtering
Wafer number	Si Power (W)	Si DC bias (V)	V Power (W)	V DC bias (V)	Pressure (mTorr)	RF Substrate Power	RF Substrate DC bias (V)	Temperature (°C)	Time (s)
wafer 1	120	189	145	309	3	-	-	RT	1600
wafer 2	120	189	145	309	3	-	-	RT	1600
wafer 3	120	189	145	309	3	-	-	RT	1600
wafer 4	120	189	145	309	3	-	-	RT	1600
wafer 5	120	189	145	309	3	-	-	300	1600
wafer 6	120	189	145	306	3	30	152	300	1600
wafer 7	120	189	145	309	3	-	-	400	1600
wafer 8	120	189	145	305	3	30	152	400	1600
wafer 9	120	188	145	309	3	-	-	500	1600
wafer 10	120	189	145	305	3	30	150	500	1600

Deposition performance

V₃Si RF-DC co-sputtering performance

Deposition conditions using RF-DC co-sputtering mode
Wafer number	RF substrate bias (W)	Deposition Temperature (°C)	Total fitted XRR thickness (nm)	Deposition rate (nm/s)	Main phase (XRD)
wafer 1	-	RT	123.3	0.0771	weak nanocrystalline V₃Si
wafer 2	-	RT	123.3	0.0771	weak nanocrystalline V₃Si
wafer 3	-	RT	123.3	0.0771	weak nanocrystalline V₃Si
wafer 4	-	RT	123.3	0.0771	weak nanocrystalline V₃Si
wafer 5	-	300	118.1	0.0737	V₃Si
wafer 6	30	300	96.5	0.0603	V₃Si
wafer 7	-	400	115.6	0.0722	V₃Si
wafer 8	30	400	100.4	0.0627	V₃Si
wafer 9	-	500	116.2	0.0725	V₃Si
wafer 10	30	500	106.6	0.0666	V₃Si

Interpretation of the first V₃Si co-sputtering test

This first test was intended to determine whether V₃Si-dominant films could be obtained by RF-DC co-sputtering of Si and V on Si wafers with 300 nm thermal SiO₂. The selected powers, 120 W RF for Si and 145 W DC for V, were derived from independent pure-element rate calibrations and correspond to a slightly V-rich estimated arrival ratio. This calculation defines a useful starting condition, but it is not a direct measurement of the film composition.

Ten wafers were deposited at fixed source powers, pressure and deposition time while the substrate temperature and RF substrate bias were varied. The no-bias films deposited at 300-500 °C have similar XRR-derived net deposition rates of approximately 0.072-0.074 nm/s. Applying 30 W RF substrate bias reduced the measured net rate to 0.060-0.067 nm/s. Relative to the corresponding no-bias films, the reduction is approximately 18% at 300 °C, 13% at 400 °C and 8% at 500 °C. Ion-assisted re-sputtering is one possible explanation, but changes in sticking, densification and the fitted XRR layer model may also contribute.

GiXRD identifies V₃Si as the dominant crystalline phase in all heated films. The room-temperature sample shows only a weak, broad feature consistent with poorly crystalline or nanocrystalline V₃Si. The scans do not provide quantitative phase fractions, and minor crystalline or amorphous contributions cannot be excluded; therefore, the films are described as V₃Si-dominant rather than phase-pure.

The final compound thickness is lower than the arithmetic sum of the independently calibrated pure V and Si thicknesses. Compound density accounts for part of this difference, while calibration geometry, sticking and co-sputtering interactions may account for the remainder. The elemental-rate calculation should therefore be used mainly to select the starting V:Si ratio, whereas XRR provides the experimental net film-growth rate.

X-Ray Reflectivity (XRR) analysis

XRR measurements were performed using a Rigaku SmartLab X-ray diffractometer. The Cu X-ray tube was operated at 40 kV and 30 mA. The incident optics included an IPS (incident parallel-slit) adapter with a 5° Soller slit. The slit configuration was IS = 0.05 mm, RS1 = 0.05 mm and RS2 = 0.075 mm. Scans were acquired with a step size of 0.01° and a counting time of 2 s per point.

XRR provides information from the critical-angle region and interference fringes. Their positions and damping were modelled to obtain film thickness, scattering-length-density-related effective mass density and interface/surface roughness. Fitting was carried out in SmartLab Studio. The reported model contains an effective semi-infinite Si-based substrate, a fitted interfacial layer where required, the deposited V₃Si main layer and a thin low-density surface overlayer attributed to oxidation, adsorbates and/or model compensation. Neither the surface overlayer nor the fitted interface is chemically identified by XRR.

The reported model tables do not explicitly contain the known 300 nm thermal SiO₂ layer. Consequently, the V₃Si thickness remains the most robust parameter, while density, roughness and especially the fitted interfacial-layer parameters may partly compensate for the simplified substrate model. A future refit should test an explicit Si/SiO₂/interface/V₃Si/surface-overlayer stack and compare fit quality and parameter stability.

Measured and fitted XRR curves for the V₃Si deposited at room temperature and without RF substrate bias. The fringe period changes systematically with film thickness.

Measured and fitted XRR curves for the V₃Si series deposited at 300-500 °C without RF substrate bias. The fringe period changes systematically with film thickness.
Measured and fitted XRR curves for the V₃Si series deposited at 300-500 °C with 30W RF substrate bias. The fringe period changes systematically with film thickness.

Extracted values

The values below are fit results and should be interpreted as model-dependent effective parameters. Thickness is generally the most robust XRR result. Density and roughness may be correlated with each other and with the assumed surface and interface layers, especially for comparatively thick or rough films.

XRR results for V₃Si layers fitted without a separate interface layer

	Fitted surface overlayer			V₃Si main layer			Effective Si-based substrate (300 nm thermal oxide not explicit)
Deposition name	Surface-overlayer thickness (nm)	Surface-overlayer density (g/cm³)	Surface-overlayer roughness (nm)	V₃Si thickness (nm)	V₃Si density (g/cm³)	V₃Si roughness (nm)	Substrate thickness (nm)	Substrate density (g/cm³)	Substrate roughness (nm)
wafer 4	2.000	1.49447	0.748	123.344	5.18332	1.798	$\infty$	2.33600	0.200
wafer 5	2.000	1.79728	1.954	118.135	5.60387	3.263	$\infty$	2.33600	0.200
wafer 7	1.989	1.78253	2.043	115.627	5.68528	2.082	$\infty$	2.33600	0.199
wafer 9	2.000	1.80000	2.262	116.206	5.82937	2.261	$\infty$	2.33600	0.200

XRR results for V₃Si layers fitted with a separate interface layer

	Fitted surface overlayer			V₃Si main layer			Fitted interfacial layer			Effective Si-based substrate (300 nm thermal oxide not explicit)
Deposition name	Surface-overlayer thickness (nm)	Surface-overlayer density (g/cm³)	Surface-overlayer roughness (nm)	V₃Si thickness (nm)	V₃Si density (g/cm³)	V₃Si roughness (nm)	Interface thickness (nm)	Interface density (g/cm³)	Interface roughness (nm)	Substrate thickness (nm)	Substrate density (g/cm³)	Substrate roughness (nm)
wafer 6	1.998	0.88036	0.343	89.925	5.57848	1.864	6.598	5.91227	0.021	$\infty$	2.33600	0.082
wafer 8	2.000	0.49279	0.552	95.877	5.46046	1.967	4.507	4.74593	0.300	$\infty$	2.33600	0.200
wafer 10	1.365	1.20000	1.090	99.122	5.68587	1.945	7.461	3.39794	1.321	$\infty$	2.33600	0.200

For the no-bias series, the fitted main-layer density increases from 5.18 g/cm³ at room temperature to 5.60, 5.69 and 5.83 g/cm³ at 300, 400 and 500 °C. This monotonic trend is consistent with thermally assisted densification and improved ordering. Bulk A15 V₃Si is expected to have a density of approximately 5.7 g/cm³; values slightly above this should not be interpreted literally because density and roughness are correlated fit parameters and the substrate stack is simplified.

The biased films have fitted main-layer densities of 5.58, 5.46 and 5.69 g/cm³ at 300, 400 and 500 °C. Bias therefore does not produce a systematic density improvement. The main-layer roughness is lower in every matched biased film than in its no-bias counterpart, but only the biased samples required an additional fitted interfacial layer. This combination is compatible with a smoother top surface together with a more complicated depth-dependent density profile; it is not proof of a chemically distinct interface phase.

For the biased samples, total fitted deposited thickness is the sum of the main and interfacial layers: 96.523 nm for wafer 6, 100.384 nm for wafer 8 and 106.583 nm for wafer 10. These totals are used as the experimental net deposited thicknesses in the performance table.

Grazing-incidence X-ray diffraction (GiXRD)

GiXRD measurements were performed on the V₃Si-coated Si/SiO₂ wafers using the Rigaku SmartLab instrument with a Cu sealed X-ray tube operated at 40 kV and 30 mA. The scans covered a 2θ range of 30–80°, using a 0.5 mm incident slit, a step size of 0.01° and a scan speed of 2°/min. The incident angle was fixed at $ω = 2^{\circ}$ relative to the sample surface.

The shallow fixed incidence increases the relative contribution from the film compared with a conventional symmetric scan, although substrate, amorphous SiO₂ and interface contributions may still be present. Peak positions were compared with reference patterns from the Crystallography Open Database (COD). Because the films may be textured, nanocrystalline and multiphase, the assignments identify the most plausible crystalline phase but do not establish phase purity or quantitative phase fractions.

The room-temperature film shows only a weak, broad feature centred near 43° 2θ, consistent with a poorly crystalline or nanocrystalline V₃Si contribution near the expected A15 (210) position. The heated films deposited at 300, 400 and 500 °C, both with and without 30 W RF substrate bias, show the reflection series expected for V₃Si as the dominant identified crystalline phase. Minor crystalline phases, amorphous material and depth-dependent composition cannot be excluded from these scans.

A simple local fit places the V₃Si-like (210) peak at approximately 42.81°, 42.76° and 42.84° for the no-bias wafers 5, 7 and 9, and at approximately 42.35°, 42.47° and 42.60° for the corresponding 30 W biased wafers 6, 8 and 10. The (200) and (211) reflections show a similar displacement toward lower angles in the biased series. This may reflect a change in lattice parameter, composition or strain, but differences in sample mounting or instrumental alignment must also be excluded. A calibrated full-pattern refinement would be required before reporting quantitative lattice parameters, strain or phase fractions.

The temperature series should be compared using consistently background-corrected peak positions, FWHM values and integrated intensities. Peak narrowing and increasing integrated V₃Si intensity can indicate improved coherent-domain size or ordering, whereas texture can alter relative peak intensities independently of phase amount. Accordingly, “V₃Si-dominant” is preferred to “phase-pure” for the present data.

Further characterization and data access

The full GiXRD description and figures, XPS survey and depth-profile results, valence-band XPS, REELS, SEM cross sections, electrical properties, sheet resistances, calculated resistivities and the complete integrated interpretation are available on the corresponding LabIntra page or upon request. Please contact Evgeniy Shkondin, DTU Nanolab, for further details and results.