Specific Process Knowledge/Thin film deposition/Deposition of V3Si

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Vanadium Silicide (V₃Si)

Vanadium silicide, V₃Si, is a metallic intermetallic compound with the cubic A15 crystal structure. It is one of the classic A15 superconductors and combines a relatively high superconducting transition temperature with high critical current density and a high upper critical magnetic field. These properties depend strongly on the V/Si ratio, A15 chemical ordering, crystalline quality, strain, film thickness, interfaces and oxygen contamination.

A particularly important property of V₃Si is its superconductivity. Well-ordered bulk material can exhibit a superconducting transition temperature, T_c, close to 17 K. Thin-film values are often lower and depend on deposition and annealing conditions; values above 13 K have nevertheless been demonstrated in silicon-compatible structures. Achieving a low and narrow transition requires formation of the A15 phase while limiting competing phases such as Si-rich VSi₂, unreacted V and oxygen-containing compounds.

V₃Si is therefore of interest for superconducting and quantum technologies, particularly where compatibility with silicon processing is important. Possible applications include superconducting interconnects, Josephson junctions, superconducting quantum interference devices (SQUIDs), microwave and kinetic-inductance structures, and other cryogenic components for silicon-integrated quantum circuits. Its relatively high T_c and critical field are attractive, but low microwave loss, reproducible interfaces, patterning behaviour and coherence performance must be demonstrated before V₃Si can be considered a mature quantum-circuit material. It remains less established for quantum devices than Al, Nb, NbN, NbTiN or TiN.

Outside quantum-device research, V₃Si is also studied for superconducting radio-frequency components, high-field superconducting structures and fundamental investigations of A15 superconductivity. In every application, a room-temperature metallic resistance or a V₃Si-like diffraction pattern is not by itself proof of superconductivity. Temperature-dependent electrical measurements through T_c, preferably together with critical-current and magnetic-field measurements, are required.

Deposition of Vanadium Silicide

At DTU Nanolab, V₃Si thin films are developed by RF-DC co-sputtering from separate elemental V and Si targets in an Ar atmosphere. Independent control of the two sources makes it possible to tune the V/Si arrival-rate ratio, while substrate temperature and optional RF substrate bias provide additional control over film density, crystallinity and net deposition rate.

The preferred tool for this application is the cluster-based multi-chamber high-vacuum sputtering system, commonly referred to as the "Cluster Lesker." The characterized PC1 process is described in detail here:

• Deposition of Vanadium Silicide (V₃Si) using RF-DC co-sputtering in Sputter-System Metal-Oxide (PC1), with the V target in Source 5 and the Si target in Source 1

As of October 2026, the characterized PC1 process uses a 3-inch V target and a 3-inch Si target. The present process-development series used 145 W DC on V, 120 W RF on Si, 3 mTorr Ar, substrate temperatures from room temperature to 500 °C, and optional 30 W RF substrate bias. Target availability and source configuration should always be confirmed before planning a run.

The required elemental thickness-rate ratio is not 3:1. After accounting for the molar masses and bulk densities of V and Si, a stoichiometric atomic arrival ratio of V:Si = 3:1 corresponds to an approximate elemental thickness-rate ratio r_V/r_Si = 2.07. The characterized process was deliberately adjusted slightly toward the V-rich side, approximately 2.2-2.3, to reduce the risk of forming Si-rich VSi₂. These calculated rates are starting values; the resulting phase and composition must be verified experimentally.

Comparison of sputter systems for V₃Si deposition

	Sputter-System Metal-Oxide (PC1)	Sputter-System Metal-Nitride (PC3)
General description	RF-DC co-sputtering from independent Si and V targets Optional RF substrate bias Characterized V3Si process available	RF-DC co-sputtering is technically possible Process parameters require separate qualification
Stoichiometry	Tunable through the independently calibrated V and Si deposition rates	Tunable through the independently calibrated V and Si deposition rates
Film thickness	Limited by process time The characterized series produced approximately 100-120 nm in 1600 s; RF bias reduced the net thickness	Limited by process time Deposition rate depends on the selected V and Si powers and must be calibrated for the source configuration
Process temperature	Up to 600 °C	Up to 600 °C
Step coverage	Some step coverage possible	Some step coverage possible
Film quality	Deposition on one side of the substrate Composition, A15 phase formation, density and resistivity depend on power ratio, temperature and substrate bias	Deposition on one side of the substrate Composition and phase formation require process development and characterization
Batch size	Many smaller samples Up to ten 100 mm or 150 mm wafers	Many smaller samples Up to ten 100 mm or 150 mm wafers
Allowed materials	Most vacuum-compatible materials, provided that they do not outgas significantly and are not highly toxic; see the cross-contamination sheets	Most vacuum-compatible materials, provided that they do not outgas significantly and are not highly toxic; see the cross-contamination sheets