Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4/SiO2 Etch
< Specific Process Knowledge | Etch | DRIE-Pegasus | Pegasus-4
Jump to navigation
Jump to search
SiO2 Etch using resist as masking material
I am in the process of doing some development of a SiO2 etch. So far I have found this fairly good recipe. For now it is the standard SiO2 etch recipes but I might change the "Standard recipe" a a later time if I find a better one. You are welcome to contact me see more result. I will add them to Labadviser at a later time. /Berit Herstrøm bghe@dtu.dk (Nanolab)
- Recipe name: SiO2_res_10, Recipe no. 10: C06445_02 coil_2500W, platen:300W, He/C4F8= 17.5, C4F8/H2=1, Pressure:8.8mTorr, C4F8:25.6sccm, He:448.7sccm, H2:25.6sccm, 3:56 min
SiO2 Etch using aSi as masking material
I am now starting up development of SiO2 etch using aSi as masking material.
The samples I use are:
- 6" Si afters with oxide (2µm),
- aSi (~300nm),
- Neg. DUV reist (~60nm barc, ~350 nm resist)
- Reticle: Danchip/Triple-D
- Dose 230 J/m2
First I need to make sure that the resist work for pattering the aSi layer is good. If the resist is not good the final etch will also not be good.
DUV optimization
Dose test with the doses (J/m2): 200, 210, 220, 230, 240, 250, 270, 280 The aim was to get good line for 400nm pitch/200nm lines
- 400nm pitch 200 nm lines
- 1000nm pitch 500 nm lines