Specific Process Knowledge/Etch/III-V ICP

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The SPTS III/V ICP in the DTU Nanolab cleanroom B-1

The III-V ICP

Name: PRO ICP
Vendor: STS (now SPTS)
The III-V ICP is a state-of-the-art etch tool. The combination of advanced hardware and software enables you to either use the optimized standard processes or to tailor etch processes for your specific needs. The tool can be used for etching of different materials, but is primarily intented for etching of III-V materials. There are two endpoint systems connected to the system. An Optical End Point System (OES) and a LASER End Point system (LEP). Information on these can be found here: Specific Process Knowledge/Etch/DryEtchProcessing

The user manual, user APV and contact information can be found in LabManager:

Equipment info in LabManager

Process information

Etch recipes

• GaAs nano etch
• InP/InGaAsP/InGaAs etch
• GaAs/AlGaAs etch
• GaN etch
• SiO2 etch
• Al2O3 etch

An overview of the performance of the III-V ICP and some process related parameters

Purpose	Dry etch of	III-V materials such as GaAs, InP, GaN, AlGaAs, InGaAs or InGaAsP Other materials such as Si, SiO2 or polymers on samples with III-V materials
Performance	Etch rates	InP: ~500 nm/min (depending on features size and etch load) GaAs : 5-500 nm/min (depending on etch process, features size and etch load) GaN: ~500 nm/min (depending on features size and etch load)
	Anisotropy	Good
Process parameter range	Process pressure	~0.1-100 mTorr
	RF Generators	Coil power 1.5 kW Platen power 600 W
	Chiller temperature	Range 20-180 degrees
	Gas flows	N2: 0-100 sccm Ar: 0-100 sccm SF6: 0-100 sccm O2: 0-100 sccm CF4: 0-100 sccm H2: 0-100 sccm CH4: 0-100 sccm BCl3: 0-100 sccm Cl2: 0-100 sccm HBr: 0-100 sccm
Substrates	Batch size	1 4" wafer per run 1 2" wafer per run Or several smaller pieces on a carrier wafer with recess
	Substrate material allowed	III-V wafers Silicon wafers with layers of silicon oxide or silicon (oxy)nitride Quartz wafers
	Possible masking material	Photoresist E-beam resist DUV resist

Additional information

Wafer bonding

To find information on how to bond wafers or chips to a carrier wafer, click here.