Specific Process Knowledge/Thermal Process/C3 Anneal-bond furnace

C3 Furnace Anneal Bond

C2 Furnace Anneal Bond: positioned in cleanroom 2

C3 Furnace Anneal Bond is a Tempress horizontal furnace for oxidation and annealing of silicon wafers.

This furnace is the third furnace tube in the furnace C-stack positioned in cleanroom 2. In this furnace it is allowed to enter wafers that comes directly from bonding in EVG NIL (assuming they were very clean when entering EVG NIL). Check the cross contamination chart. If you are in doubt, please send a mail to furnace@danchip.dtu.dk.

The user manual(s), technical information and contact information can be found in LabManager:

Anneal Bond

Process knowledge

Oxidation: look at the Oxidation page
Annealing: look at the Annealing page

Overview of the performance of Anneal Bond furnace and some process related parameters

Purpose	Oxidation and annealing	Oxidation: Dry Wet: with bubbler (water steam + N₂)
Performance	Film thickness	Dry SiO₂: 50 Å to ~2000 Å (takes too long to make it thicker) Wet SiO₂: 50 Å to ~5 µm (takes too long to make it thicker)
Process parameter range	Process Temperature	800-1150 ^oC
	Process pressure	1 atm
	Gas flows	N₂:5 sccm O₂:5 sccm
Substrates	Batch size	1-30 4" wafer (or 2" wafers) per run
Substrates	Substrate material allowed	Silicon wafers (new from the box or RCA cleaned) Silicon wafers with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned) Quartz wafers (RCA cleaned) From bonding in EVG NIL directly (assuming they fulfilled the above before entering the EVG NIL)