Specific Process Knowledge/Thermal Process/Jipelec RTP: Difference between revisions
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| style="background:LightGrey; color:black"|Substrate material allowed | | style="background:LightGrey; color:black"|Substrate material allowed | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
A silicon carrier wafer with 1 µm oxide is always need (except for III-V materials) | |||
*Silicon | *Silicon | ||
*Silicon oxides | *Silicon oxides | ||