Specific Process Knowledge/Thermal Process/Jipelec RTP: Difference between revisions

Revision as of 15:21, 26 November 2012

Jipelec - Rapid Thermal Processing

The Jipelec is a rapid thermal processing oven. It should be used for fast and well-controlled annealing or alloying of samples. It is possible to use a pyrometer to control the temperature (of the carrier).

Purpose	RTP annealing
Performance
Process parameter range	Process Temperature	0-1000 ^oC High temperature ramp >300 ^oC
	Process pressure	1 atm vacuum
	Gasses on the system	N₂
Substrates	Batch size	1 4" wafer (or 2" wafers) per run Small samples
Substrates	Substrate material allowed	Silicon Silicon oxides Silicon nitrides Quartz Polysilicon Titan III-V materials (on graphite carrier) Silicon wafers (new from the box or RCA cleaned) In doubt: look at the cross contamination chart or send a mail to the Furnace group.

@@ Line 6: / Line 6: @@
-{| border="2" cellspacing="0" cellpadding="10"
+{| border="2" cellspacing="0" cellpadding="0"
 |-
-!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Process parameter ranges
+!style="background:silver; color:black;" align="center"|Purpose
+|style="background:LightGrey; color:black"|RTP annealing
+|style="background:WhiteSmoke; color:black"|
+|-
+!style="background:silver; color:black" align="center"|Performance
+|style="background:LightGrey; color:black"|
+|style="background:WhiteSmoke; color:black"|
+|-
+!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range
 |style="background:LightGrey; color:black"|Process Temperature
 |style="background:WhiteSmoke; color:black"|
-*0-1000 degree Celsius
+*0-1000 <sup>o</sup>C
+*High temperature ramp >300 <sup>o</sup>C
 |-
 |style="background:LightGrey; color:black"|Process pressure
 |style="background:WhiteSmoke; color:black"|
-*atmosphere pressure
+*1 atm
 *vacuum
+|-
+|style="background:LightGrey; color:black"|Gasses on the system
+|style="background:WhiteSmoke; color:black"|
+*N<sub>2</sub>
+|-
+!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Substrates
+|style="background:LightGrey; color:black"|Batch size
+|style="background:WhiteSmoke; color:black"|
+*1 4" wafer (or 2" wafers) per run
+*Small samples
 |-
-!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Performance
 | style="background:LightGrey; color:black"|Substrate material allowed
 |style="background:WhiteSmoke; color:black"|
@@ Line 29: / Line 49: @@
 *Titan
 *III-V materials (on graphite carrier)
-|-
+*Silicon wafers (new from the box or RCA cleaned)
-|style="background:LightGrey; color:black"|Allowed materials on substrate
+*In doubt: look at [http://www.labmanager.danchip.dtu.dk/view_binary.php?fileId=1250 the cross contamination chart] or send a mail to [mailto:furnace@danchip.dtu.dk the Furnace group].
-|style="background:WhiteSmoke; color:black"|
-*
 |-
 |}