Specific Process Knowledge/Etch/DRIE-Pegasus/processC: Difference between revisions
Appearance
No edit summary |
No edit summary |
||
| Line 1: | Line 1: | ||
== Process C == | |||
Process A is labelled Nano silicon etch. In the acceptance test the process was run on a 100 mm Danchip wafer with a test pattern of a series of lines and dots with sizes ranging from 30 nm to 300 nm. The etch load was extremely high, approaching 100 %. | |||
The 100 mm wafers had an Al mask made by lift-off: | The 100 mm wafers had an Al mask made by lift-off: | ||
# 80 nm of spin coated ZEP520A E-beam resist | # 80 nm of spin coated ZEP520A E-beam resist | ||