Specific Process Knowledge/Lithography/Aligners/Aligner: Maskless 01 processing: Difference between revisions
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After installation, multiple tests were conducted in order to assess the overlay accuracy of Aligner: Maskless 01. The conclusion to the early tests were that the stage accuracy is ±0.1µm, and the machine-to-self overlay accuracy is ±0.5µm. The machine-to-machine overlay accuracy was not determined (due to the lack of a suitable mask for the mask aligners). In 2019, efforts to establish regular QC of the equipment were started, and the accuracy of the alignment mark detection has been measured regularly since 2020. While both the average and the spread of the alignment errors for the x-axis (measured in 3x3 positions covering a 60x60mm<sup>2</sup> area) has consistently been within the ±1µm specification of the machine, the spread of the alignment errors for the y-axis is typically 3±1µm, despite the average error being in spec, due to negative offsets on the upper half of the wafer and positive offsets on the lower. In 2025, it was decided to investigate this problem further, in order to determine whether a specific alignment protocol could remedy the alignment error, or whether the acceptance limits for the QC would have to be changed. | After installation, multiple tests were conducted in order to assess the overlay accuracy of Aligner: Maskless 01. The conclusion to the early tests were that the stage accuracy is ±0.1µm, and the machine-to-self overlay accuracy is ±0.5µm. The machine-to-machine overlay accuracy was not determined (due to the lack of a suitable mask for the mask aligners). In 2019, efforts to establish regular QC of the equipment were started, and the accuracy of the alignment mark detection has been measured regularly since 2020. While both the average and the spread of the alignment errors for the x-axis (measured in 3x3 positions covering a 60x60mm<sup>2</sup> area) has consistently been within the ±1µm specification of the machine, the spread of the alignment errors for the y-axis is typically 3±1µm, despite the average error being in spec, due to negative offsets on the upper half of the wafer and positive offsets on the lower. In 2025, it was decided to investigate this problem further, in order to determine whether a specific alignment protocol could remedy the alignment error, or whether the acceptance limits for the QC would have to be changed. | ||
The result of these tests suggest that when aligning to a pattern exposed using MLA1, only 2 alignment marks on the X-axis should be used. If the first pattern was exposed using a different tool, 4 alignment marks must be used (with all corrections applied), but the alignment accuracy in Y-direction suffers. | The result of these tests suggest that when aligning to a pattern exposed using MLA1, only 2 alignment marks on the X-axis should be used. If the first pattern was exposed using a different tool, 4 alignment marks must be used (with all corrections applied), but the alignment accuracy in Y-direction suffers. The Y-shift grows linearly with the size of the pattern/sample, so small samples will be less affected, while full wafers will experience shifts in Y that far exceed the ±1µm specification. In general, larger alignment error in Y must be accepted when aligning to a pattern exposed on a different tool. By scaling the design, however, it is possible to compensate for the Y-shift and achieve alignment within the machine specification across an entire wafer. | ||
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<br>Aligning using only 2 marks yields acceptable shifts in the center of the wafer, but very large shifts in X towards the edges, as evidenced by the 7.4µm deviation in X. The raw data suggests that this deviation is mainly due to a 0.2mRad tilt in the Y-axis, which corresponds well with the 0.1mRad shearing measured using 4 marks. There is also a (-)40ppm scaling along the X-axis, again similar to what was measured during 4 mark alignment. Even a 5mm chip would be affected by the 0.2mRad tilt, so clearly 4 mark alignment is needed when aligning to a pattern that was not exposed using MLA1. | <br>Aligning using only 2 marks yields acceptable shifts in the center of the wafer, but very large shifts in X towards the edges, as evidenced by the 7.4µm deviation in X. The raw data suggests that this deviation is mainly due to a 0.2mRad tilt in the Y-axis, which corresponds well with the 0.1mRad shearing measured using 4 marks. There is also a (-)40ppm scaling along the X-axis, again similar to what was measured during 4 mark alignment. Even a 5mm chip would be affected by the 0.2mRad tilt, so clearly 4 mark alignment is needed when aligning to a pattern that was not exposed using MLA1. | ||
<br>Attempting to fix the shift in Y when using 4 alignment marks by adding 0;0 as the first mark makes no difference. And the success from the MLA1-MLA1 test when using 3 marks on the bottom half of the wafer is unfortunately not repeated for MLA3-MLA1 alignment. Using alignment marks on the top half of the wafer also doesn't change the shift. The raw data from all the alignment tests using scaling and shearing compensation (3+ marks) shows the best alignment at the bottom of the wafer, with an increasing shift in Y due to a scaling error around -40ppm. Reducing the exposed area reduces the shift in Y, but the raw data show the same trend as the large area; best alignment at the bottom of the exposed area and a scaling error in Y around -40ppm. | <br>Attempting to fix the shift in Y when using 4 alignment marks by adding 0;0 as the first mark makes no difference. And the success from the MLA1-MLA1 test when using 3 marks on the bottom half of the wafer is unfortunately not repeated for MLA3-MLA1 alignment. Using alignment marks on the top half of the wafer also doesn't change the shift. The raw data from all the alignment tests using scaling and shearing compensation (3+ marks) shows the best alignment at the bottom of the wafer, with an increasing shift in Y due to a scaling error around -40ppm. Reducing the exposed area reduces the shift in Y, but the raw data show the same trend as the large area; best alignment at the bottom of the exposed area and a scaling error in Y around -40ppm. | ||
<br>When MLA3 is used to align to a pattern printed using MLA1, the resulting spread of alignment errors is quite small, showing that MAL3 is better at compensating for the differences between the two machines than MLA1, and suggesting that the problem stems only from MLA1. | <br>When MLA3 is used to align to a pattern printed using MLA1, the resulting spread of alignment errors is quite small, showing that MAL3 is better at compensating for the differences between the two machines than MLA1, and suggesting that the problem stems only from MLA1. A final test attempted to compensate for the observed -40ppm scaling error in Y by scaling the pattern printed using MLA1 by 40ppm (around 0;0) prior to printing. This reduces the deviation in Y, showing that it is possible to achieve good alignment even when the first pattern is printed using a different tool. Unfortunately, the scaling function during conversion doesn't seem to work, so the scaling has to be done in the design file itself, using an external layout editor. The -1µm shift in Y remained, but it should be possible to compensate for this shift either by shifting the pattern during conversion (keep in mind the shift scales with the size of the pattern) or by scaling the pattern from the bottom of the design, rather than the center. | ||
=Optimal use of the maskless aligner= | =Optimal use of the maskless aligner= | ||