Specific Process Knowledge/Thermal Process/C3 Anneal-bond furnace

The content on this page, including all images and pictures, was created by DTU Nanolab staff, unless otherwise stated.

Feedback to this page: click here

Anneal-bond furnace (C3)

Anneal-bond furnace (C3). Positioned in cleanroom B-1/ Photo: DTU Nanolab internal

The Anneal-bond furnace (C3) is a Tempress horizontal furnace for oxidation and annealing of new and processed (e.g. bonded) silicon wafers. O₂) is used as an oxidant for dry oxidation, and for wet oxidation water vapour is being generated by a bubbler.

This furnace is the third tube in the furnace C-stack positioned in cleanroom B-1.

In this furnace it is allowed oxidize and anneal new wafers without doing an RCA clean first. Also silicon wafers from PECVD4 and wafers without any metal coming from PECVD3 and bonded wafers comming directly from the Wafer Bonder 02 (assuming they were clean and not have been exposed to any metal when entering wafer bonder) can be processed in the furnace without an RCA cleaning. Check the cross contamination information in LabManager before you use the furnace.

The user manual, technical information and contact information can be found in LabManager:

Anneal-bond Furnace (C3)

Process knowledge

• Oxidation: look at the Oxidation page
• Annealing: look at the Annealing page

Overview of the performance of the Anneal Bond furnace (C3) and some process related parameters

Purpose	Oxidation of Si wafers Annealing of processed wafers, eg. bonded wafers from EVG NIL	Annealing: Using N2 Oxidation: Dry oxidation using O2 Wet oxidation using H2O vapour generated by a bubbler
Performance	Film thickness and quality	Dry oxide:~ 0 nm to 300 nm (it takes too long to grow thicker dry oxide layers) Wet oxide: ~ 0 nm to 3 µm (23 hours wet oxidation at 1100 oC) Break-down voltage measurement results
Process parameter range	Process temperature	800-1150 oC
	Process pressure	1 atm (no vacuum)
	Gas flows	N2: 0-10 slm O2: 0-10 slm
Substrates	Batch size	1-30 100 mm wafers (or 50 mm wafers)
	Substrate materials allowed	Silicon wafers Silicon wafers with layers of silicon oxide or silicon nitride Wafers from the LPCVD furnaces Wafers from PECVD4 Wafers from PECVD3 (without any metal) Wafers from Wafer Bonder 02 (assuming they were clean and not have been exposed to any metal when entering the Wafer Bonder 02)