Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4/SiO2 Etch/Cr mask: Difference between revisions

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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:225sccm, Pressure:3.35mTorr" perrow="6" widths="200px" heights="150px">
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:225sccm, Pressure:3.35mTorr" perrow="6" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:225sccm, Pressure:3.35mTorr; platen power 150W, coil power:1200W" perrow="6" widths="200px" heights="150px">
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:225sccm, Pressure:3.35mTorr; platen power 150W, coil power:1200W" perrow="6" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:215sccm O2:10sccm, Pressure:3.6mTorr; platen power 150W, coil power:1200W" perrow="6" widths="200px" heights="150px">
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:215sccm O2:10sccm, Pressure:3.6mTorr; platen power 150W, coil power:1200W" perrow="6" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1200W" perrow="7" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:215sccm O2:10sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 100W, coil power:1200W" perrow="7" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch (PLEASE DO NOT REPEAT THIS LONG TIME), H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 100W, coil power:1200W" perrow="7" widths="200px" heights="150px">
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch (PLEASE DO NOT REPEAT THIS LONG TIME), H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 100W, coil power:1200W" perrow="7" widths="200px" heights="150px">
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File:Contour Plot Y32 EM_02_30 blue to red.jpg| Etch on none patterned wafer, Uniformity: +- 6.4%
File:Contour Plot Y32 EM_02_30 blue to red.jpg| Etch on none patterned wafer, Uniformity: +- 6.4%
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 10 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px">
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 10 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch, EM:0/0 H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.9mTorr; platen power 100W, coil power:1200W" perrow="7" widths="200px" heights="150px">
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch, EM:0/0 H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.9mTorr; platen power 100W, coil power:1200W" perrow="7" widths="200px" heights="150px">
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File:Contour Plot Y33 EM_0_0 blue to red.jpg| Etch on none patterned wafer, Uniformity: +-1.7%
File:Contour Plot Y33 EM_0_0 blue to red.jpg| Etch on none patterned wafer, Uniformity: +-1.7%
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch, EM:0/0 H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.9mTorr; platen power 100W, coil power:2500W" perrow="7" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch, EM:0/0 H2:0sccm, C4F8:13sccm He:225sccm O2:0sccm, Pressure:3.9mTorr; platen power 200W, coil power:2500W" perrow="7" widths="200px" heights="150px">
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch, EM:0/0 H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.9mTorr; platen power 200W, coil power:2500W" perrow="7" widths="200px" heights="150px">
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<gallery caption=" C10751: SiO2 etch with Cr mask on wafer piece on Si carrier 20 min etch, EM:0/0 H2:0sccm, C4F8:6.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 50W, coil power:600W" perrow="7" widths="200px" heights="150px">
<gallery caption=" C10751: SiO2 etch with Cr mask on wafer piece on Si carrier 20 min etch, EM:0/0 H2:0sccm, C4F8:6.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 50W, coil power:600W" perrow="7" widths="200px" heights="150px">
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<gallery caption=" C10752: SiO2 etch with Cr mask on wafer piece on Si carrier 30 min etch, EM:0/0 H2:0sccm, C4F8:6.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 25W, coil power:300W" perrow="6" widths="200px" heights="150px">
<gallery caption=" C10752: SiO2 etch with Cr mask on wafer piece on Si carrier 30 min etch, EM:0/0 H2:0sccm, C4F8:6.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 25W, coil power:300W" perrow="6" widths="200px" heights="150px">
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<gallery caption=" C10834: SiO2 etch with Cr mask on wafer piece on Si carrier 45 min etch, EM:0/0 H2:0sccm, C4F8:6.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 25W, coil power:300W" perrow="6" widths="200px" heights="150px">
<gallery caption=" C10834: SiO2 etch with Cr mask on wafer piece on Si carrier 45 min etch, EM:0/0 H2:0sccm, C4F8:6.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 25W, coil power:300W" perrow="6" widths="200px" heights="150px">
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<gallery caption=" C10844: SiO2 etch with Cr mask on wafer piece on Si carrier 50 min etch, EM:0/0 H2:0sccm, C4F8:6.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 20W, coil power:300W" perrow="6" widths="200px" heights="150px">
<gallery caption=" C10844: SiO2 etch with Cr mask on wafer piece on Si carrier 50 min etch, EM:0/0 H2:0sccm, C4F8:6.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 20W, coil power:300W" perrow="6" widths="200px" heights="150px">
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File:C10844_09.jpg

Revision as of 16:19, 5 February 2024

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Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab

SiO2 trench etching with Cr mask

Start parameters, variations noted in the gallery headline Recipe name: no 10 with lower platen power
Coil Power [W] 2500
Platen Power [W] 200
Platen temperature [oC] 20
H2 flow [sccm] 25.6
C4F8 flow [sccm] 25.6
He flow [sccm] 448.7
Pressure Fully open APC valve (8-9 mTorr)
Electromagnetic coils (EM) 'outer coil' / 'inner coil' '2 A' / '30 A' (PLEASE DO NOT RUN WITH THESE SETTINGS FOR MORE THAN 6 MIN)
  • 100 nm Cr mask etched in ICP metal with 500nm DUV neg resist (NUV 2300-0.5) and 65 nm barc.
Cr mask before SiO2 etch 800 nm pitch 50% duty cycle. The The Cr linewidth is clearly less than designed


Results

Temporary conclusions on how the process parameters affect the results in this study: What process parameters affect the results?
  • Going from full wafer to small piece on Si carrier:
    • Seemed to give more sidewall passivation
  • Platen power: lowering the platen power gives
    • more sidewall passivation
    • lower etch rate
    • Less trenching
  • Removing the H2 gave:
    • less sidewall passivation
  • Adding O2 gave:
    • less sidewall passivation
  • Process pressure/total gasflow rate
    • Reducing total gasflow rate which reduced the pressur inside the chamber gave:
      • less sidewall passivation
      • Reduced the CD (Critical Dimensions)
  • Coil power: Reducing coil power
    • less CD loss
    • more sidewall passivation
  • Increasing process time:
    • less sidewall passivation
    • more sidewall bow
    • CD loss due to larger mask faceting
  • Sidewall passivation↑
    • Sample size↓
    • Platen power↓
    • Coil power↓
    • H2 flow↑
    • O2 flow↓
    • Total gas flow rate/pressure↑

Profile SEM images

Recipe settings SEM gallery
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Profile, top view at tilted SEM images on 800 nm pitch and 50% duty cycle ( look at the Cr mask in top of the page