Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4: Difference between revisions
Line 24: | Line 24: | ||
*[[/Slow etch|Slow etch of silicon nitride and silicon oxide]] | *[[/Slow etch|Slow etch of silicon nitride and silicon oxide]] | ||
Revision as of 08:35, 22 August 2023
Feedback to this page:
click here
Unless otherwise stated, this page is written by DTU Nanolab internal
Pegasus 4 - 150mm silicon oxide and silicon nitride etching
The user manual and contact information can be found in LabManager:
DRIE Pegasus 4 in LabManager - requires login
Process information
Standard recipes
Wafer bonding
To find information on how to bond wafers or chips to a carrier wafer, click here.