Specific Process Knowledge/Lithography/EBeamLithography/JEOLJobPreparation: Difference between revisions
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===Chip alignment | ===Chip alignment SDF === | ||
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If set up properly on good quality marks mode 1 or mode 4 chip alignment can usually execute in about 1-2 seconds per mark. The time estimate at compilation will account for the time spend on chip alignment at the current settings of the '''CHIPAL''' subprogram. | If set up properly on good quality marks mode 1 or mode 4 chip alignment can usually execute in about 1-2 seconds per mark. The time estimate at compilation will account for the time spend on chip alignment at the current settings of the '''CHIPAL''' subprogram. | ||
===Chip alignment | ===Chip alignment JDF === | ||
In addition to the use of '''CHMPOS''' for chip mark position definition the example below illustrate making arrays of an array. The first array is set up as a 2x2 array assigning array '''A1'''. '''A1''' is defined below as '''1:''', since '''1''' is defined as an array it can be referenced as '''A1'''. '''A''' then defines a 5x5 array assigning pattern '''P(1)''' to each element. The chip mark position command must be used in the same array that assigns the corresponding pattern. | In addition to the use of '''CHMPOS''' for chip mark position definition the example below illustrate making arrays of an array. The first array is set up as a 2x2 array assigning array '''A1'''. '''A1''' is defined below as '''1:''', since '''1''' is defined as an array it can be referenced as '''A1'''. '''A''' then defines a 5x5 array assigning pattern '''P(1)''' to each element. The chip mark position command must be used in the same array that assigns the corresponding pattern. | ||