Specific Process Knowledge/Lithography/EBeamLithography/JEOLPatternPreparation: Difference between revisions
Appearance
| Line 56: | Line 56: | ||
Chip marks should be placed at the corners of each chip with a gap of at least 100 µm to any important structure. Bear in mind that beam scan during alignment is a high dose exposure of the mark area and hence this resist will develop (for a positive resist). This is illustrated in the microscope images below. On the left side is a global mark which has been scanned | Chip marks should be placed at the corners of each chip with a gap of at least 100 µm to any important structure. Bear in mind that beam scan during alignment is a high dose exposure of the mark area and hence this resist will develop (for a positive resist). Eventhough the beam is only a few nm in diameter (dependent on exposure current) the affected area is much larger due to backscatter and proximity effect. This is illustrated in the microscope images below. On the left side is a global mark which has been scanned once in x and y rough scan and several times in fine scan mode at various locations. On the right is a chip mark that has been scanned a single time in x and y. | ||
[[File:9500MarkScan.png|1000px|center|frameless]] | [[File:9500MarkScan.png|1000px|center|frameless]] | ||