Specific Process Knowledge/Lithography/EBeamLithography/JEOLPatternPreparation: Difference between revisions
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Chip marks should be placed at the corners of each chip with a gap of at least 100 µm to any important structure. Bear in mind that beam scan during alignment is a high dose exposure of the mark area and hence this resist will develop (for a positive resist). This is illustrated in the microscope images below. On the left side is a global mark which has been scanned several times, both in rough scan and fine scan mode. On the right is a chip mark that has been scanned a single time in x and y. | Chip marks should be placed at the corners of each chip with a gap of at least 100 µm to any important structure. Bear in mind that beam scan during alignment is a high dose exposure of the mark area and hence this resist will develop (for a positive resist). This is illustrated in the microscope images below. On the left side is a global mark which has been scanned several times, both in rough scan and fine scan mode. On the right is a chip mark that has been scanned a single time in x and y. | ||
[[File: | [[File:9500MarkScan.png|1000px|center|frameless]] | ||