Specific Process Knowledge/Lithography/EBeamLithography/JEOLPatternPreparation: Difference between revisions
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=== Alignment mark position and dimensions === | === Alignment mark position and dimensions === | ||
As a minimum two global alignment marks must be present on the substrate for alignment. In JEOL terms these are P and Q marks. These can be used to align a full substrate design or as initial alignment of chip arrays with individual chip marks. For chip alignment either one mark (M1) or four marks (M1-M4) must be used. | As a minimum two global alignment marks must be present on the substrate for alignment. In JEOL terms these are P and Q marks. These can be used to align a full substrate design or as initial alignment of chip arrays with individual chip marks. For chip alignment either one mark (M1) or four marks (M1-M4) must be used. Global alignment (SETWFR) has a rough scan and a fine scan condition. | ||
[[File:9500AlignmentMarks.png|1000px|center|frameless]] | [[File:9500AlignmentMarks.png|1000px|center|frameless]] | ||