Specific Process Knowledge/Etch/ICP Metal Etcher/Chromium: Difference between revisions
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==Chromium etch of hardmask for silicon nitride etching by Anders Simonsen@nbi.ku [[Image:section under construction.jpg|70px]]== | ==Chromium etch of hardmask for silicon nitride etching by Anders Simonsen@nbi.ku [[Image:section under construction.jpg|70px]]== | ||
''Added by bghe@Nanolab'' | ''Added by bghe@Nanolab'' <br> | ||
Anders has done some work on optimizing the Cr etch for at 20-40 nm thick Cr that was to be used as masking for a silicon nitride etch. The Cr etch was carriered out on the ICP metal and the silicon nitride etch was done on the AOE. You can see his results in this summery that he has made: | Anders has done some work on optimizing the Cr etch for at 20-40 nm thick Cr that was to be used as masking for a silicon nitride etch. The Cr etch was carriered out on the ICP metal and the silicon nitride etch was done on the AOE. You can see his results in this summery that he has made: | ||
* [[:File:report_summer2022 Anders Simonsen bghe edits.pdf | Cr etch development report summery by Anders Simonesen, summer of 2022 ]] | * [[:File:report_summer2022 Anders Simonsen bghe edits.pdf | Cr etch development report summery by Anders Simonesen, summer of 2022 ]] |
Revision as of 11:36, 27 September 2022
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Chromium etch in ICP metal - small substrate using carrier
The Chromium etch was carried out on the following substrate stack: 2" Si wafer with Cr laying in a 6" Si wafer with a 4" recess. The area outside the recess was covered by AZ resist. The work was carried out be Erol Zekovic @Nanotech and BGHE@nanolab
Parameter | Cr etch |
---|---|
Cl2 (sccm) | 65 |
O2 (sccm) | 15 |
Pressure (mTorr) | 15 |
Coil power (W) | 300 |
Platen power (W) | 15 |
Temperature (oC) | 50 |
Spacers (mm) | 100 |
Etch rate (nm/min) | ~32 (Date: 2014-08-13) |
Zep520A resist selectivity | NA |
Comment | Was masked by capton tape |
Chromium etch of hardmask for silicon nitride etching by Anders Simonsen@nbi.ku
Added by bghe@Nanolab
Anders has done some work on optimizing the Cr etch for at 20-40 nm thick Cr that was to be used as masking for a silicon nitride etch. The Cr etch was carriered out on the ICP metal and the silicon nitride etch was done on the AOE. You can see his results in this summery that he has made:
- Cr etch development report summery by Anders Simonesen, summer of 2022
- Here are the raw test data and SEM images from Anders Simonsen
Chromium etch in ICP metal on a thick glass substrate
The Chromium etch has ONLY been carried out on the following substrate stack: The Chromium is sputter deposited onto a 2" quartz wafer and patterned by e-beam with Zep520A resist. This 2" QZ wafer is bonded with crystal bond to a 65mmx65mm quartz plate with the thickness: 6.35mm. This QZ plate is bonded to a Si wafer.
Parameter | Cr etch |
---|---|
Cl2 (sccm) | 65 |
O2 (sccm) | 15 |
Pressure (mTorr) | 15 |
Coil power (W) | 300 |
Platen power (W) | 15 |
Temperature (oC) | 50 (no back side cooling) |
Spacers (mm) | 100 |
Etch rate (nm/min) | ~14 |
Zep520A resist selectivity | ~0.9 |
Comment | . |