Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4: Difference between revisions
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To find information on how to bond wafers or chips to a carrier wafer, click [[Specific Process Knowledge/Etch/DryEtchProcessing/Bonding| here]]. | To find information on how to bond wafers or chips to a carrier wafer, click [[Specific Process Knowledge/Etch/DryEtchProcessing/Bonding| here]]. | ||
'''Internal Nanolab Process log for Pegasus 4''' | |||
Process log at Nanolab [http://labintra.nanolab.dtu.dk/index.php/Main_Page/Process_Logs/bghe/Pegasus4] | |||
Process log at Nanolab [http://labintra.nanolab.dtu.dk/index.php/Main_Page/Process_Logs/ |
Revision as of 16:06, 16 November 2020
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Pegasus 4 - 150mm silicon oxide and silicon nitride etching
The tool is already installed and ready to process. The picoscope, the chamber are working well right now but we still have some troubles with the wafers aligner in the loadlock.
The user manual(s), quality control procedure(s) and results, user APV(s) are not available, technical information and contact information can be found in LabManager:
Equipment info in LabManager
Process information
Hardware changes
A few hardware modifications have been made on the Pegasus 3/4 since it was installed in 2019. The changes are listed below.
Other etch processes
More processes, such as for DUV resist, are currently being developed, but they are not quite 'ready for publication' at LabAdviser so please contact Jonas (mailto:jmli@dtu.dk) for more information.
Wafer bonding
To find information on how to bond wafers or chips to a carrier wafer, click here.
Internal Nanolab Process log for Pegasus 4
Process log at Nanolab [1]