Specific Process Knowledge/Lithography/Aligners/Aligner: Maskless 02 processing: Difference between revisions
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The measurements are used to calculate the misalignment of the second layer with respect to the first print. The median of all measurement points in X or Y (reported as "Shift") is a measure for the average overall offset between the first and second print. At each point, this error is a combination of three contributions: The translational error ("Misplacement") is the amount by which the image is shifted; the run-in/run-out error ("Run-out") is the amount of gain in the image; and the rotational error ("Rotation") is the angle by which the image is rotated. The unit of ppm (parts per million) is used as rotation and run-out are generally small. A rotation of 1ppm corresponds to an angle of 0.2" (arcseconds) or a shift of 100nm across an entire 4" wafer, while a run-out of 1ppm corresponds to a shift of 50nm at the edge of a 4" wafer compared to the center. For comparison, the pixel size at the wafer surface is 160nm X 160nm, and the address grid size is 40nm. | The measurements are used to calculate the misalignment of the second layer with respect to the first print. The median of all measurement points in X or Y (reported as "Shift") is a measure for the average overall offset between the first and second print. At each point, this error is a combination of three contributions: The translational error ("Misplacement") is the amount by which the image is shifted; the run-in/run-out error ("Run-out") is the amount of gain in the image; and the rotational error ("Rotation") is the angle by which the image is rotated. The unit of ppm (parts per million) is used as rotation and run-out are generally small. A rotation of 1ppm corresponds to an angle of 0.2" (arcseconds) or a shift of 100nm across an entire 4" wafer, while a run-out of 1ppm corresponds to a shift of 50nm at the edge of a 4" wafer compared to the center. For comparison, the pixel size at the wafer surface is 160nm X 160nm, and the address grid size is 40nm. | ||
The deviations (±) given for the results here are calculated as half the range of measurements. If the range is smaller than the measurement uncertainty, the measurement uncertainty is used in stead. | The deviations (±) given for the results here are calculated as half the range of measurements. If the range is smaller than the measurement uncertainty, the measurement uncertainty is used in stead. | ||
The samples used for these tests are 100mm Si wafers coated with a 1.5µm layer of positive tone resist (AZ 5214E or MiR 701). | The samples used for these tests are 100mm Si wafers coated with a 1.5µm layer of positive tone resist (AZ 5214E or MiR 701). | ||