Specific Process Knowledge/Thin film deposition/Deposition of Silicon Oxide/Deposition of Silicon Oxide using Lesker sputter tool: Difference between revisions
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=Sputter deposition of SiO<sub>2</sub> using Sputter-System (Lesker)= | =Sputter deposition of SiO<sub>2</sub> using Sputter-System (Lesker)= | ||
SiO<sub>2</sub> can be sputter deposited with RF bias in the Sputter-System (Lesker). You will find information on the pressure, max power and expected deposition rate on the [[Specific_Process_Knowledge/Thin_film_deposition/Lesker|Equipment page]] here in LabAdviser. To see the deposition parameters used by others, | SiO<sub>2</sub> can be sputter deposited with RF bias in the Sputter-System (Lesker). You will find information on the pressure, max power and expected deposition rate on the [[Specific_Process_Knowledge/Thin_film_deposition/Lesker|Equipment page]] here in LabAdviser. To see the deposition parameters used by others, search the [http://labmanager.dtu.dk/function.php?module=Processlog&view=editlog&machid=244 Process Log] in LabManager. | ||
Below you will find the deposition parameters and results of a study on the surface roughness and oxide insulation quality of the deposited films. | Below you will find the deposition parameters and results of a study on the surface roughness and oxide insulation quality of the deposited films. | ||
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The Lesker CMS 18 sputter system provides thin films of varying surface roughness. This roughness was verified to be dependent on the sputtered material, sputter mode (DC or RF) and the substrate bias strength. Other probable factors include sputter power and pressure. Below is a table of results for SiO<sub>2</sub>. Similar studies were carried out for Si and Ta. | The Lesker CMS 18 sputter system provides thin films of varying surface roughness. This roughness was verified to be dependent on the sputtered material, sputter mode (DC or RF) and the substrate bias strength. Other probable factors include sputter power and pressure. Below is a table of results for SiO<sub>2</sub>. Similar studies were carried out for Si and Ta. | ||
The " | The "SiO<sub>2</sub> target (RF sputter)" study was done on clean Si substrates. The sputter power was 157W and the pressure 3.5 mTorr using RF sputtering of a SiO<sub>2</sub> target. The film thicknesses were around 42 nm. | ||
===From | ===From SiO<sub>2</sub> target (RF sputter)=== | ||
{| {{table}} border="1" cellspacing="0" cellpadding="8" | {| {{table}} border="1" cellspacing="0" cellpadding="8" | ||
| align="center" style="background:#f0f0f0;"|'''Wafer nr''' | | align="center" style="background:#f0f0f0;"|'''Wafer nr''' | ||
| align="center" style="background:#f0f0f0;"|'''RF bias (W)''' | | align="center" style="background:#f0f0f0;"|'''RF bias (W)''' | ||
| align="center" style="background:#f0f0f0;"|'''Reactive | | align="center" style="background:#f0f0f0;"|'''Reactive O<sub>2</sub> (%)''' | ||
| align="center" style="background:#f0f0f0;"|'''Power(W)''' | | align="center" style="background:#f0f0f0;"|'''Power(W)''' | ||
| align="center" style="background:#f0f0f0;"|'''Rq (RMS) (nm)''' | | align="center" style="background:#f0f0f0;"|'''Rq (RMS) (nm)''' | ||
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''by Bjarke Thomas Dalslet @Nanotech.dtu.dk'' | ''by Bjarke Thomas Dalslet @Nanotech.dtu.dk'' | ||
The wafers in this analysis consisted of a Si substrate with no native oxide. A layer of SiO< | The wafers in this analysis consisted of a Si substrate with no native oxide. A layer of SiO<sub>2</sub> was reactively sputtered (9% O<sub>2</sub> 90 W 3.5 mTorr). After that, using a shadow mask, 200nm thick gold rectangles was electro deposited on top of the oxide. Gold was also electro deposited on the back side. Then the impedance as a function of frequency was recorded. | ||
The figure shows the measurements for different oxide thicknesses. Most of the measurements show perfect capacitors, although for illustration measurements with a few pinholes and with many pinholes is also shown for the 20 nm sample. | The figure shows the measurements for different oxide thicknesses. Most of the measurements show perfect capacitors, although for illustration measurements with a few pinholes and with many pinholes is also shown for the 20 nm sample. | ||