Specific Process Knowledge/Thermal Process/C4 Aluminium Anneal furnace: Difference between revisions
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*Annealing of wafers with aluminium | *Annealing of wafers with aluminium | ||
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!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range | !style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range | ||
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*N<sub>2</sub>: 0-10 slm | *N<sub>2</sub>: 0-10 slm | ||
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!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Substrates | !style="background:silver; color:black" align="center" valign="center" rowspan="2"|Substrates | ||
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*Silicon wafers with aluminium. | *Silicon wafers with aluminium. | ||
Silicon wafers with ALD oxides | *Silicon wafers with ALD oxides Al2O<sub>3<{sub> and TiO<sub>2</sub> | ||
*Wafers are allowed enter the furnace after aluminium lift-off or after aluminium etch and resist strip in acetone | *Wafers are allowed enter the furnace after aluminium lift-off or after aluminium etch and resist strip in acetone | ||
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