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Specific Process Knowledge/Etch/III-V ICP/SiO2: Difference between revisions

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Bghe (talk | contribs)
DCH-Employees-701, NLAB-Employees-701, NLAB-LabmanagerAllUsers, Bureaucrats, Administrators
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No edit summary
Line 40: Line 40:
|Selectivity to  resist [:1]
|Selectivity to  resist [:1]
|Not known
|Not known
|-
|Etch rate in silicon
|
bghe@Nanolab 20190117
*35 nm/min (middle of the wafers with 80% load)
*36 nm/min (edge of the wafers with 80% load)
|-
|-
|Wafer uniformity (100mm)
|Wafer uniformity (100mm)
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