Specific Process Knowledge/Etch/III-V ICP/InP-InGaAsP-InGaAs

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InP/InGaAsP/InGaAs etch

Unselective etch for large sized features and small aspect ratios by David Larsson, DTU Photonics, 2011

Recipe	InP Etch 1/InP Precond 1
Cl2 flow	20 sccm
N2 flow	40 sccm
Ar flow	10 sccm
Platen power	100 W
Coil power	500 W
Pressure	2 mTorr
Platen chiller temperature	180 oC
Comment	Use SiO2 carrier (not Si) (Kabi/Bghe June 2018)

Results (InP Etch 1)
Etch rate	500-600 nm/min
Sidewall angle	86-87 o
Selectivity (InP:SiO2, InP:HSQ)	50:1

• Result of InP etching. David Larsson, DTU Photonics, 2011
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InP etching June 2018

Done by Kabi and Bghe @danchip

Sample pattern before etching

• Oxide mask before etching.
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  Top view of the SiO2 mask before etching
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  Top view of the SiO2 mask before etching

Etching of an InP piece on Si carrier

InP piece patterned with SiO2. The piece was etched on top of a Si wafer without bonding. The recipe "InP etch" was used. The roughness looks high in the bottom of the etched areas, especially in the large open areas.

• Result of InP etching.
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  low roughness in narrow trenched
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  low roughness in narrow trenched
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  A little higher roughnedd is larger trences
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  Much larger roughness in open areas
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  Zoom in on the large roughness
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  closed look at the large roughness in the open areas.

Etching of an InP piece on SiO2 carrier

InP piece patterned with SiO2. The piece was etched on top of a Si wafer coated with SiO2 without bonding. The recipe "InP etch" was used. The roughness looks low in the bottom of the etched areas, even in the large open areas.

• Result of InP etching.
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  Top view: oxide is gone on the narrow lines, low roughness in the trenches.
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  Top view: low roughness in the trenches.
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  30 dg view: low roughness in the trenches
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  30 dg view: low roughness in the trenches
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  Top view: low roughness in trench and in the large area

Changing the Cl2/N2 ratio

• Result of changing the Cl2/N2 ratio.
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  Sample S0: Top view of the oxide mask before etching. It is the TRAVKA50 mask, but it is clear that the CD reduction is about the 1-1.5 µm of the lines.
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  Sample S4: Profile view. The recipe InP etch has been used.
  The sample has been run on a SiO2 carrier wafer.
  There is not much CD change compared to the oxide mask before the etch.
  It seems like the SiO2 mask is gone and the sidewall angle from the mask has been transferred into the sample.
  The sidewall profile is quit vertical in the lower part.
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  Sample S5: Profile view. The recipe InP etch has been used but with modified Cl2 and N2 flows: N"=30 sccm Cl2=30 sccm.
  The sample has been run on a SiO2 carrier wafer.
  There is not much CD change compared to the oxide mask before the etch.
  It seems like the SiO2 mask is gone.
  the sidewall profile is overcutting probably due to too little passivation.
• File:None
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  Sample S4: The sidewall roughness on the sample S4 is quit high
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  Sample S5: The sidewall roughness on the sample S5 is quit low.