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Jehan (talk | contribs)
DCH-Employees-701, NLAB-Employees-701, NLAB-LabmanagerAllUsers, NLAB-Nlab307-labadviser-users-34891, Bureaucrats, danchip, Administrators
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== <!-- Mask Design --> ==
== Mask Design ==
<!--
<!--
DTU Danchip offers a Tool Package Training in Mask Design.  
DTU Danchip offers a Tool Package Training in Mask Design.  
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!Schedule
!Schedule
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'''Theoretical part'''
* Self-study using screen cast videoes demonstrating the use of either CleWin og L-edit.
* Self-study using screen cast videoes demonstrating the use of either CleWin og L-edit and an exercise where you a guide through the design of a mask.
* An exercise where you are guided through the design of a mask.
 
'''Practical part'''
* An optional ½ hour Q&A session with an expert on mask layout. You can make an appointment after finishing the exercise.
* An optional ½ hour Q&A session with an expert on mask layout. You can make an appointment after finishing the exercise.
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!Location
!Location
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'''Theoretical part'''
* Anywhere you like. DTU network access required.
* Anywhere you like. Internet access required.
'''Practical part'''
*
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!Qualified Prerequisites
!Qualified Prerequisites
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* That you have passed the Danchip Introduction course
* Basic knowledge about micro-lithography
* Access to a computer where you can install Clewin or L-edit
** Danchip provide free access to Clewin 5 use through a network license.
** If you want to use L-edit you will need a valid license of your own
* Basic knowledge about micro-fabrication techniques
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!Preparations
!Preparations
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'''Before the lecture'''
None
* Watch the videos
'''Before training session'''
*
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!Learning Objectives
!Learning Objectives
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* Get acquainted with the either Clewin 5 or L-edit mask design programs
* Get acquainted with either Clewin 5 or L-edit mask design programs
* practice how to
* construct basic mask structures (rectangles, polygons, circles etc.)
**  
* Be able to manipulate shapes in different ways (merge, intersect, XOR, subtract, invert, move, scale, rotate, mirror, grow/shrink, duplicate, align etc.)
**
* use mask layers for a process
* organize a hierarchical mask design
* choose mask polarity and orientation for different resist types and Front/Back-side alignment
* discuss tolerances related to mask design/process flows
* distinguish between critical/non-critical process/mask steps
* design appropriate test structures for a process
* select appropriate alignment marks for a process
* make a chip/wafer layout usable for dicing
* export the layout to cif or gds files with appropriate layer names
* make a mask order


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