Specific Process Knowledge/Etch/Etching of Silicon/Si etch using ASE: Difference between revisions
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==Etching Si without back side cooling== | ==Etching Si without back side cooling== | ||
Etching in an ICP as the ASE without backside cooling normally results in heating up the sample to more than 100 degrees Celsius. This can be problematic especially with using resist as a masking material. <br> | |||
There can be many reasons for not applying cooling to the sample. Among these are samples that need to be processed on a carrier due to sensitive backsides, sticky backsides or structures on the backside, small samples, membranes that can break, bowing wafers or something else. <br> | |||
To meet these needs we have developed a silicon etch in the RIE mode where the coil power is not being used. The coil creates a high density plasma and that has a higher plasma temperature than than a low density plasma created by the platen power in RIE mode. <br> | |||