Specific Process Knowledge/Etch/RIE (Reactive Ion Etch): Difference between revisions

Revision as of 13:39, 4 March 2008

Etching using the dry etch technique RIE (Reactive Ion Etch)

RIE1 (part of cluster1) - positioned in cleanroom2

RIE2 (part of cluster2)- positioned in cleanroom3

At Danchip we have three RIE's. Two (RIE1 and RIE2) for etching silicon based materials (silicon, silicon oxide, sillicon nitride) and one (III-V RIE) for etching III-V materials. The hardware of RIE1 and RIE2 is very similar but you cannot count on that identical recipes on RIE1 and RIE2 perform exactly the same. In addition to that the main difference between RIE1 and RIE2 is the cleanness of the two equipment. In rough terms RIE1 is the clean system and the RIE2 is the dirty system. This means that in RIE2 opposed to RIE1 it is allowed to have small amounts of metals exposed to the plasma. Look in the manuals for RIE1 and RIE2 to read the details for this difference (you can find the manuals in LabManager [1]).

Process information

A rough overview of the performance of the RIE´s and some process related parameters

Purpose	Dry etch of	Silicon Silicon oxide Silicon (oxy)nitride
Performance	Etch rates	Silicon: ~0.04-0.8 µm/min Silicon oxide:~0.02-0.15 µm/min Silicon (oxy)nitride:~0.02-? µm/min
.	Anisotropy	Can vary from isotropic to anisotropic with vertical sidewalls and on to a physical etch were the sidewalls are angled but without etching under the mask.
Process parameter range	Process pressure	~20-200 mTorr
.	Gas flows	SFFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _6} : 0-130 sccm OFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _2} : 0-100 sccm CHFFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _3} : 0-100 sccm CFFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _4} : 0-84 sccm HFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _2} : ?sccm Ar: 0-145 sccm NFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _2} : 0-100 sccm CFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _2} FFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _6} : 0-24 sccm
Substrates	Batch size	1 4" wafer per run 1 2" wafer per run Or several smaller pieces
.	Substrate material allowed	Silicon wafers with layers of silicon oxide or silicon (oxy)nitride Quartz wafers
.	Possible masking material	Photoresist/e-beam resist Silicon/PolySi Silicon oxide or silicon (oxy)nitride Aluminium Other metals if the coverage is <5% of the wafer area (ONLY PECVD3!)

@@ Line 2: / Line 2: @@
 [[image:Cluster1a.jpg|200x200px|right|thumb|RIE1 (part of cluster1) - positioned in cleanroom2]]
 [[image:Cluster2x.jpg|200x200px|right|thumb|RIE2 (part of cluster2)- positioned in cleanroom3]]
-At Danchip we have three RIE's. Two (RIE1 and RIE2) for etching silicon based materials (silicon, silicon oxide, sillicon nitride) and one (III-V RIE) for etching III-V materials. The hardware of RIE1 and RIE2 is very similar but you cannot count on that identical recipes on RIE1 and RIE2 perform exactly the same. In addition to that the main difference between RIE1 and RIE2 is the cleanness of the two equipment. In rough terms RIE1 is the clean system and the RIE2 is the dirty system. This means that in RIE2 opposed to RIE1 it is allowed have small amounts of metals exposed to the plasma. Look in the manuals for RIE1 and RIE2 to read the details for this difference (you can find the manuals in LabManager [http://labmanager.danchip.dtu.dk/machine/machine_item.aspx?id=19]).
+At Danchip we have three RIE's. Two (RIE1 and RIE2) for etching silicon based materials (silicon, silicon oxide, sillicon nitride) and one (III-V RIE) for etching III-V materials. The hardware of RIE1 and RIE2 is very similar but you cannot count on that identical recipes on RIE1 and RIE2 perform exactly the same. In addition to that the main difference between RIE1 and RIE2 is the cleanness of the two equipment. In rough terms RIE1 is the clean system and the RIE2 is the dirty system. This means that in RIE2 opposed to RIE1 it is allowed to have small amounts of metals exposed to the plasma. Look in the manuals for RIE1 and RIE2 to read the details for this difference (you can find the manuals in LabManager [http://labmanager.danchip.dtu.dk/machine/machine_item.aspx?id=19]).
 == Process information ==