Jump to content

Specific Process Knowledge/Lithography/EBeamLithography/JBX9500Manual: Difference between revisions

← Older editNewer edit →
VisualWikitext
Tigre (talk | contribs)
DCH-Employees-701
2,257 edits
Tigre (talk | contribs)
DCH-Employees-701
2,257 edits
Line 366: Line 366:
= Alignment of exposure to existing pattern on wafer =
= Alignment of exposure to existing pattern on wafer =


If you need to align an exposure to an existing pattern on a wafer you need wafer marks (or global marks) to align your exposure to. If you are exposing chips (i.e. many small GDS-files you repeat in a matrix), chip marks is recommended to align every chip.
If you need to align an exposure to an existing pattern on a wafer you need wafer marks (or global marks) to align your exposure to. This step requires extra training.
 
 
First time you align on a type of wafer marks, you need to optimise the gain settings of the scan. The gain settings will depend on resist thickness, mark type (metal or etch) and substrate type. The gain settings can be found by the subprogram '''ACGRG'''.
 
When the gain settings are known, you can execute '''SETWFR''' and '''CHIPAL'''.
 
 


'''Please note that manual alignment (using the SEM) is not allowed.''' You should use semi-automatic alignment only. In rare cases where semi-automatic alignment is impossible, you should remove the resist around the wafer marks before loading the wafer/chip into the machine.
'''Please note that manual alignment (using the SEM) is not allowed.''' You should use semi-automatic alignment only. In rare cases where semi-automatic alignment is impossible, you should remove the resist around the wafer marks before loading the wafer/chip into the machine.
== Design of global marks and chip marks ==


{| cellpadding="2" style="border: 2px solid darkgray;" align="right"
{| cellpadding="2" style="border: 2px solid darkgray;" align="right"
Line 394: Line 403:
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual#top|Go to top of this page]]</span>
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual#top|Go to top of this page]]</span>


Alignment of wafer or chip requires specific training.


First time you align on a type of wafer marks, you need to optimise the gain settings of the scan. The gain settings will depend on resist thickness, mark type (metal or etch) and substrate type. The gain settings can be found by the subprogram '''ACGRG'''.
When the gain settings are known, you can execute '''SETWFR''' and '''CHIPAL'''.


== AGCRG ==
== Optimise gain settings on back-scattered electron detector: AGCRG ==
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual#top|Go to top of this page]]</span>
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual#top|Go to top of this page]]</span>


Line 431: Line 436:
<br>
<br>


== SETWFR ==
== Subprogram that scan global marks: SETWFR ==
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual#top|Go to top of this page]]</span>
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual#top|Go to top of this page]]</span>


Line 632: Line 637:
<br clear="all" />
<br clear="all" />


== CHIPAL ==
== Subprogram that detcets chip marks: CHIPAL ==
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual#top|Go to top of this page]]</span>
<span style="font-size: 90%; text-align: right;">[[Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual#top|Go to top of this page]]</span>


Retrieved from "https://labadviser.nanolab.dtu.dk//index.php?title=Specific_Process_Knowledge/Lithography/EBeamLithography/JBX9500Manual"