Specific Process Knowledge/Etch/Wet Polysilicon Etch: Difference between revisions
No edit summary |
|||
| Line 2: | Line 2: | ||
[[Image:Wet_PolySi_etch.jpg|300x300px|thumb|Wet PolySilicon Etch (in the middle): positioned in cleanroom 4]] | [[Image:Wet_PolySi_etch.jpg|300x300px|thumb|Wet PolySilicon Etch (in the middle): positioned in cleanroom 4]] | ||
Wet Etching of silicon nitride - stoichiometric and si-rich - is done in a dedicated laminar flow bench with an integrated quartz tank (Tiger Tank - TT-4). The quartz tank can take up to one 6" wafer carrier. The flow bench is placed in cleanroom 4. The process is mainly used to strip silicon nitride (maskless), but can also be used for masked etching of silicon nitride using some kind of silicon oxide as etch mask. However, the wet silicon nitride etch is isotropic meaning that the under-etching (etch-bias) at least amounts to the thickness of the silicon nitride layer. | |||
The etch solution is initially 85 wt% H<sub>3</sub>PO<sub>4</sub> which is heated up to the boiling temperature - ca. 157 <sup>o</sup>C. Water is allowed to boil off thus raising the concentration and the boiling temperature of the solution until a boiling temperature of 180 <sup>o</sup>C is reached. Thereafter, the wafers are submerged into the bath and the water-cooled lid is closed to maintain the concentration and the boiling temperature. In some cases a lower boiling temperature is chosen - typically 160 <sup>o</sup>C - which lowers the etch rate and improves the selectivity R<sub>Si<sub>3</sub>N<sub>4</sub></sub> / R<sub>SiO<sub>2</sub></sub>. | |||
'''NB: Great care has to be taken in this process due to risk of "shock-boiling" ''' | |||
===Nitride etch - key facts=== | |||
{| border="1" cellspacing="0" cellpadding="4" align="left" | |||
! | |||
! Nitride etch @ 180 <sup>o</sup>C | |||
! Nitride etch @ 160 <sup>o</sup>C | |||
|- | |||
|General description | |||
| | |||
Etch/strip of silicon nitride | |||
| | |||
Etch/strip of silicon nitride | |||
|- | |||
|Chemical solution | |||
|H<sub>3</sub>PO<sub>4</sub> (85 wt%) | |||
|H<sub>3</sub>PO<sub>4</sub> (85 wt%) | |||
|- | |||
|Process temperature | |||
|180 <sup>o</sup>C | |||
|160 <sup>o</sup>C | |||
|- | |||
|Possible masking materials: | |||
| | |||
*Thermal oxide (converted si-rich surface) | |||
*LPCVD-oxide (TEOS) | |||
*PECVD-oxide | |||
| | |||
*Thermal oxide (converted si-rich surface) | |||
*LPCVD-oxide (TEOS) | |||
*PECVD-oxide | |||
|- | |||
|Etch rate | |||
| | |||
*~85 Å/min (stoichiometric Si<sub>3</sub>N<sub>4</sub>) | |||
*~60 Å/min (si-rich Si<sub>3</sub>N<sub>4</sub>) | |||
*~30 Å/min (annealed si-rich Si<sub>3</sub>N<sub>4</sub>) | |||
*~4 Å/min (Thermal oxide) | |||
| | |||
*~26 Å/min (si-rich Si<sub>3</sub>N<sub>4</sub>) | |||
*~? Å/min (Thermal oxide) | |||
|- | |||
|Batch size | |||
| | |||
1-25 wafers at a time | |||
| | |||
1-25 wafer at a time | |||
|- | |||
|Size of substrate | |||
| | |||
2-6" wafers | |||
| | |||
2-6" wafers | |||
|- | |||