Specific Process Knowledge/Bonding: Difference between revisions
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*[[/Fusion bonding|Fusion bonding]] | *[[/Fusion bonding|Fusion bonding]] | ||
*[[/Anodic bonding|Anodic bonding]] | *[[/Anodic bonding|Anodic bonding]] | ||
== Comparing the three bonding methods in the EVG NIL == | |||
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|style="background:WhiteSmoke; color:black"|<b>[[/Eutectic bonding|Eutectic bonding]]</b> | |||
|style="background:WhiteSmoke; color:black"|<b>[[/Fusion bonding|Fusion bonding]]</b> | |||
|style="background:WhiteSmoke; color:black"|<b>[[/Anodic bonding|Anodic bonding]]</b> | |||
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!style="background:silver; width:100px; color:black;" align="center"|General description | |||
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For bonding two substrates by use of an interphase that makes an eutecticum. | |||
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For bonding two identical materials. | |||
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For bonding Si and Glass. | |||
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!style="background:silver; color:black" align="center" valign="center"|Bonding temperature | |||
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Depending on the eutecticum 310°C to 400°C. | |||
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Depending on defects 50°C to 400°C. | |||
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Depending on the voltage 300°C to 500°C Standard is 400°C. | |||
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!style="background:silver; color:black" align="center" valign="center"|Annealing temperature | |||
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No annealing | |||
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1000°C in the bond furnace C3. | |||
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No annealing | |||
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!style="background:silver; color:black" align="center" valign="center"|Materials possible to bond | |||
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Bonding of substrates is done by use of the eutectica Au/Si, Au/Sn and Au/Sn/Ni | |||
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Si/Si, SiO2/SiO2 | |||
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Si/Pyrex (glass) | |||
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!style="background:silver; color:black" align="center" valign="center"|Substrate size | |||
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Up to 6" (aligning only possible for 4" and 6") | |||
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Up to 6" (aligning only possible for 4" and 6") | |||
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Up to 6" (aligning only possible for 4" and 6") | |||
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!style="background:silver; color:black" align="center" valign="center"|Cleaning | |||
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Cleaning by N2. | |||
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Wet chemical cleaning, [[Specific Process Knowledge/Wafer cleaning/IMEC|IMEC]]. | |||
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Cleaning by N2. | |||
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!style="background:silver; color:black" align="center" valign="center"|IR alignment | |||
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Double side polished wafers. | |||
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Double side polished wafers. | |||
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Not relevant. | |||
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