Specific Process Knowledge/Thermal Process/C3 Anneal-bond furnace: Difference between revisions

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==Anneal-bond furnace (C3)==
==Anneal-bond furnace (C3)==
[[Image:C3.JPG|thumb|300x300px|C3 Anneal-bond furnace. Positioned in cleanroom 2]]
[[Image:C3.JPG|thumb|300x300px|Anneal-bond furnace (C3). Positioned in cleanroom 2]]


The Anneal-bond furnace (C3) is a Tempress horizontal furnace for oxidation and annealing of new and processed (bonded) silicon wafers.
The Anneal-bond furnace (C3) is a Tempress horizontal furnace for oxidation and annealing of new and processed (bonded) silicon wafers.
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This furnace is the third furnace tube in the furnace C-stack positioned in cleanroom 2.  
This furnace is the third furnace tube in the furnace C-stack positioned in cleanroom 2.  


In this furnace it is allowed oxidize and anneale wafers without doing a RCA clean first. Also bonded wafers comming directly from the EVG NIL (assuming they were clean and not contain any metal when entering EVG NIL). Check the cross contamination information in LabManager.
In this furnace it is allowed oxidize and anneal wafers without doing an RCA clean first. Also bonded wafers comming directly from the EVG NIL (assuming they were clean and not have been exposed to any metal when entering EVG NIL). Check the cross contamination information in LabManager before you use the furnace.


'''The user manual, technical information and contact information can be found in LabManager:'''
'''The user manual, technical information and contact information can be found in LabManager:'''

Revision as of 10:49, 13 January 2014

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Anneal-bond furnace (C3)

Anneal-bond furnace (C3). Positioned in cleanroom 2

The Anneal-bond furnace (C3) is a Tempress horizontal furnace for oxidation and annealing of new and processed (bonded) silicon wafers.

This furnace is the third furnace tube in the furnace C-stack positioned in cleanroom 2.

In this furnace it is allowed oxidize and anneal wafers without doing an RCA clean first. Also bonded wafers comming directly from the EVG NIL (assuming they were clean and not have been exposed to any metal when entering EVG NIL). Check the cross contamination information in LabManager before you use the furnace.

The user manual, technical information and contact information can be found in LabManager:

Anneal-bond Furnace (C3)

Process knowledge

Overview of the performance of Anneal Bond furnace and some process related parameters

Purpose
  • Oxidation of Si wafers
  • Annealing of processed wafer, eg. bonded wafers
Oxidation:
  • Dry
  • Wet: with bubbler (water steam + N2)
Performance Film thickness
  • Dry SiO2: 50 Å to ~2000 Å (it takes too long to grow a thicker oxide)
  • Wet SiO2: 50 Å to ~5 µm (it takes too long to grow a thicker oxide)
Process parameter range Process Temperature
  • 800-1150 oC
Process pressure
  • 1 atm
Gas flows
  • N2: 5 sccm
  • O2: 5 sccm
Substrates Batch size
  • 1-30 4" wafer (or 2" wafers) per run
Substrate material allowed
  • Silicon wafers (new from the box or RCA cleaned)
  • Silicon wafers with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
  • Quartz wafers (RCA cleaned)
  • From bonding in EVG NIL directly (assuming they were clean and not contain any metal when entering EVG NIL)