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Specific Process Knowledge/Thermal Process/C1 Furnace Anneal-oxide: Difference between revisions

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|style="background:LightGrey; color:black"|Gas flows
|style="background:LightGrey; color:black"|Gas flows
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*Annealing: N<sub>2</sub>:5 sccm
*Annealing: N<sub>2</sub>: 5 sccm
*Dry oxidation: O<sub>2</sub>:5 sccm
*Dry oxidation: O<sub>2</sub>: 5 sccm
*Wet oxidation: N<sub>2</sub>:5 sccm
*Wet oxidation: N<sub>2</sub>: 5 sccm
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!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Substrates
!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Substrates
|style="background:LightGrey; color:black"|Batch size
|style="background:LightGrey; color:black"|Batch size
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*1-30 4" and 6" wafer (or 2" wafers) per run
*1-30 100 mm or 150 wafers (or 50 mm wafers) per run
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| style="background:LightGrey; color:black"|Substrate material allowed
| style="background:LightGrey; color:black"|Substrate material allowed
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*Silicon wafers with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
*Silicon wafers with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
*Quartz wafers (RCA cleaned)
*Quartz wafers (RCA cleaned)
*From PECVD1 directly (assuming they fulfilled the above before entering the PECVD1)
*From PECVD2 directly (wafer have to be RCA cleaned before entering PECVD2)
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