Specific Process Knowledge/Lithography/Coaters

Coaters: Comparison Table

Equipment		SSE Spinner	KS Spinner	Spin Track 1 + 2	Manual Spinner 1	III-V Spinner	Spray Coater
Purpose		Coating and baking of AZ5214E resist AZ4562 resist E-beam resist	Coating and baking of AZ5214E resist AZ4562 resist SU8 resist	In-line substrate HMDS priming Coating and baking of AZ MiR 701 (29cps) resist AZ nLOF 2020 resist Post-exposure baking at 110°C	Coating of all resist	Coating of UV sensetive resist E-beam resist	Spraying imprint resist Spraying photoresist Spraying of other solutions
Performance	Substrate handling	Cassette-to-cassette Edge handling chuck	Single substrate Non-vacuum chuck for fragile substrates	Cassette-to-cassette	Single substrate		Can handle almost any sample size and shape
	Permanent media	AZ5214E resist AZ4562 resist Acetone for chuck cleaning Acetone for drip pan	AZ5214E resist PGMEA for edge bead removal Acetone for chuck cleaning	AZ MiR 701 (29cps) resist AZ nLOF 2020 resist PGMEA for backside rinse and edge-bead removal PGMEA for spinner bowl cleaning and vapor tip bath	Only manual dispense		No permanent media
	Manual dispense option	2 automatic syringes	yes pneumatic dispense for SU8 resist	no			Two syringe pumps
Process parameter range	Spindle speed	100-5000 rpm	100-5000 rpm	10 - 9990 rpm	100-5000 rpm	10-5000 rpm
	Gyrset	optinal	optinal	no	no	no
Substrates	Substrate size	50 mm wafers 100 mm wafers 150 mm wafers	100 mm wafer 150 mm wafer	100 mm wafers 150 mm wafer	50 mm wafers 100 mm wafers 150 mm wafer small pieces down to 10x10 mm2	50 mm wafers 100 mm wafers 150 mm wafer small pieces down to 3x3 mm2	Any sample(s) that fit inside machine
	Batch size	1-24	1	1-25	1	1	1
	Allowed materials	All cleanroom materials except III-V materials	All cleanroom materials except III-V materials	Silicon Glass	All cleanroom materials except III-V materials	III-V materials Si, SiO2, SOI	All chemicals to be spray coated must be approved specifically for spray coating Any non-toxic, non-particulate and non-crosslinking material is likely to be approved

SSE Spinner

The SSE spinner MAXIMUS: positioned in Cleanroom 13.

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The SSE spinner MAXIMUS: positioned in Cleanroom 13. SSE Spinner, Maximus 804, SSE Sister Semiconductor Equipment is a resist spinning system at Danchip which can be used for spinning on 2", 4" and 6" substrates.

The system is equipped with 2 different resists lines:

• AZ5214E
• AZ4562

and

• 2 syringe lines, which can be used for spinning of e-beam resist.

The user manual, user APV, and contact information can be found in LabManager

Spin Track 1 + 2

Spin Track 1 + 2 in Cleanroom 3

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Spin Track 1 + 2 is an SVG 88 series track system from Rite Track. Each track consists of a HMDS priming module, a spin coating module, and a baking module. In fact, the only difference between the two tracks is the resist used in the spin coating module. Spin Track 1 + 2 is capable of handling 150 mm wafers, as well as 100 mm wafers, but is currently set up for 100 mm wafer processing.

The Spin Track 1 + 2 is controlled using the Recipe Manager software via the touchscreen on the arm attached to the lefthand end of the track. Recipes for the individual modules are developed by Danchip and combined into flows. The user selects a flow (specific to track 1 or 2), and the appropriate recipes will be downloaded and executed on the appropriate track. The other track runs an empty process (no wafers needed), and can unfortunately not be used by a second user while the first user is processing.

The user manual, user APV, and contact information can be found in LabManager

Process information

• General Spin Track 1 + 2 process information
• HMDS priming on Spin Track 1 and 2
• AZ MiR 701 (29cps) coating on Spin Track 1
• AZ nLOF 2020 coating on Spin Track 2
• Post-exposure baking on Spin Track 2

Equipment performance and process related parameters

Spin Track		1	2
Purpose		HMDS priming Spin coating and soft baking Priming, coating, and baking	HMDS priming Spin coating and soft baking Priming, coating, and baking Post-exposure baking
Resist		AZ MiR 701 (29cps) positive tone	AZ nLOF 2020 negative tone
Performance	Coating thickness	1 - 3 µm	1.6 - 5 µm
	HMDS contact angle	60 - 90° (on SiO2)
Process parameters	Spin speed	10 - 9990 rpm
	Spin acceleration	1000 - 50000 rpm/s
	Hotplate temperature	90°C	110°C
	HMDS priming temperature	50°C
Substrates	Substrate size	100 mm wafers
	Allowed materials	Silicon (with oxide, nitride, or metal films or patterning) Glass (borosilicate and quartz)
	Batch	1 - 25

KS Spinner

The KS spinner is placed in Cleanroom 3.

At Danchip we have RC8-THP system which is one of the SUSS MicroTech spinners.

The main purpose of this equipment is experimental spinning the different resist.The spinner has one resist line, AZ5214E, for automatic dispense. All other resist dispenses manually from syringe or disposable pipettes. All SU8 spinning are done on this machine.

The machine can be also used for spinning on the "difficult" surfaces like the substrates with holes, backside structures and unusual shapes.

The user manual, user APV, and contact information can be found in LabManager

Manual Spinner 1 (Laurell)

The Manual Spinner(Polymers) is placed in fumehood in Cleanroom 3.

The user manual, user APV, and contact information can be found in LabManager

Manual Spinner (Polymers)

The user manual, user APV, and contact information can be found in LabManager

III-V Spinner

The III-V spinner is a SÜSS RC8 Spin Coater intended for processing of III-V compound semiconductors and CMOS compatible materals. Please note, that there are different chucks for III-V materials and Si-, SiO2-materials. The spinner is mounted in a flow hood located in the III-V laboratory (yellow room). The extra exhaust should always be turned on while spinning.

The user manual, user APV, and contact information can be found in LabManager

III-V Aligner positioned in III-V cleanroom

Performance	Maximum speed	Cover closed: 7000 rpm Cover open: 1000 rpm Gyrset: 3000 rpm non-vaccum chuck: 5000 rpm
	Maximum acceleration	5000 rpm/s
	Substrate size	Maximum substrate size: 6" Minimum substrate size: 3*3 mm2 maximum substrate thickness: 4 mm
	Allowed Substrate material	III-V compound semiconductors CMOS compatible materials